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(1 - 6 of 6)
- Title
- EFFECTS OF DEPOSITION TEMPERATURE AND POST DEPOSITION ANNEALING ON THE ELECTRICAL PROPERTIES OF BARIUM STRONTIUM TITANATE THIN FILM FOR EMBEDDED CAPACITOR APPLICATIONS.
- Creator
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Peelamedu Ranganathan, Raviprakash, Kalpathy. B, Sundaram, University of Central Florida
- Abstract / Description
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A higher degree of system level integration can be achieved by integrating the passive components into semiconductor devices, which seem to be an enabling technology for portable communication and modern electronic devices. Greater functionality, higher performance and increase in reliability can be achieved by miniaturizing and reducing the number of components in integrated circuits. The functional potential of small electronic devices can be enormously increased by implementing the...
Show moreA higher degree of system level integration can be achieved by integrating the passive components into semiconductor devices, which seem to be an enabling technology for portable communication and modern electronic devices. Greater functionality, higher performance and increase in reliability can be achieved by miniaturizing and reducing the number of components in integrated circuits. The functional potential of small electronic devices can be enormously increased by implementing the embedded capacitors, resistors and inductors. This would free up surface real estate allowing either a smaller footprint or more silicon devices to be placed on the same sized substrate. This thesis focuses on the effect of deposition temperature and post deposition annealing (PDA) in different gas ambient on the electrical properties of sputter deposited ferroelectric Barium Strontium Titanate (Ba0.5St0.5) TiO3 thin film capacitors. Approximately 2000Å of Barium Strontium Titanate (BST) thin film was deposited at different substrate temperatures (400,450,500 and 550◦C) on cleaned silicon substrates. These BST films were then annealed separately in 100% N2, 100% O2 and 10% O2 + 90% N2 at 575◦C in sputtering machine (PVD anneal) and a three zone annealing Lindberg furnace. The objective of this thesis was to compare the effect of PDA on the electrical properties of BST films deposited at different substrate temperatures between PVD annealing and furnace annealing. For this work, tantalum thin film was used as top and bottom electrode to fabricate the capacitors. BST thin film capacitors were fabricated and characterized for leakage current and dielectric breakdown. Roughness study on pre and post annealed BST films were done using optical profilometer. The capacitors were tested using HP impedance analyzer in the frequency range from 10Hz through 1 MHz. From the experiments, 100% O2 annealed furnace annealed BST thin film seem to have better dielectric constant, higher breakdown voltage and nominal capacitance density.
Show less - Date Issued
- 2004
- Identifier
- CFE0000314, ucf:46310
- Format
- Document (PDF)
- PURL
- http://purl.flvc.org/ucf/fd/CFE0000314
- Title
- SURFACE CHARACTERIZATION OF THIN FILM ZNO CAPACITORS BY CAPACITANCE-VOLTAGE MEASUREMENTS.
- Creator
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Smith, Linda, del Barco, Enrique, University of Central Florida
- Abstract / Description
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The main objective of the research was the fabrication and characterization of MOS/MIS capacitors with ZnO as the insulating layer. Comparison with the already well known behavior of MOS/MIS capacitors with SiO2 as insulator was used to facilitate determination of the ZnO characteristics. Moreover, thermal annealing of the samples led to increased understanding of the role of defects on the dielectric properties of the ZnO layers in the MOS/MIS devices. Hall-effect transport measurements and...
Show moreThe main objective of the research was the fabrication and characterization of MOS/MIS capacitors with ZnO as the insulating layer. Comparison with the already well known behavior of MOS/MIS capacitors with SiO2 as insulator was used to facilitate determination of the ZnO characteristics. Moreover, thermal annealing of the samples led to increased understanding of the role of defects on the dielectric properties of the ZnO layers in the MOS/MIS devices. Hall-effect transport measurements and x-ray diffraction (XRD) spectroscopy are used to analyze the structure and electronic surface characteristics of the ZnO insulator. Capacitance-voltage (C-V) measurements are used to understand the effect of surface interface charges and fixed oxide charges in the MOS/MIS (metal-oxide (insulator)-semiconductor) capacitor. The results of the Hall-effect measurement will reveal several things; the sheet resistance, carrier concentration, and mobility as well as confirm the type of silicon used. The optical spectrophotometry measurement confirmed the band gap of 3.2 eV for ZnO. The x-ray diffraction data confirmed a (002) orientation polycrystalline wurtzite ZnO structure. Initial capacitance-voltage measurement of SiO2 and ZnO revealed that the capacitance was larger for SiO2 than for ZnO. This study also explores the impact of thermal annealing on the performance of the ZnO capacitors. Hall-effect measurements are used to evaluate the influence of thermal annealing on the resistivity, carrier concentration and mobility as a function of annealing temperature. ZnO is an n-type semiconductor; this n-type conductivity is due to deviations from the stoichiometry as a result of oxygen vacancies and interstitial zinc. After ZnO samples were annealed at different temperatures, the Hall-effect measurements were performed. After thermal annealing, the mobility increased significantly by two orders of magnitude, but both the carrier concentration and the sheet density decreased. A threshold voltage (turn-on) of –1V was observed for the ZnO sample annealed at 980oC. ZnO is very versatile material with the potential for use in field effect transistors, solar cells, sensors, surface acoustic wave devices and photodiodes due to the high conductivity and high transmittance in the visible part of the spectrum. ZnO as an insulator works through analytical solutions, but not necessarily through this investigation. The difference in oxide thickness during rf magentron sputtering change the capacitance for ZnO making it lower. For n-type substrates it appears that the capacitance after annealing was higher than the capacitance before annealing. After annealing, a stretched out capacitance-voltage curve indicates the presence of trapped oxide charges and an unsmoothed surface. A high resistivity material could be used for some devices. However, typically low resistivity materials are used. After ZnO samples were annealed (unetched) at different temperatures, the Hall-effect were performed and the mobility increased significantly by two orders of magnitude, but the sheet density decreased along with the carrier concentration. The only sample that appears to come to a high frequency C-V in equilibrium is the ZnO sample annealed at 980oC. The depletion region was distinguishable and the transition point (threshold voltage) was found to be at -1 V.
Show less - Date Issued
- 2007
- Identifier
- CFE0001630, ucf:47176
- Format
- Document (PDF)
- PURL
- http://purl.flvc.org/ucf/fd/CFE0001630
- Title
- EFFICIENCY IMPROVEMENT TECHNIQUES FOR HIGH VOLTAGE CAPACITOR CHARGING METHODS.
- Creator
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Islas, Michael, Batarseh, Issa, University of Central Florida
- Abstract / Description
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The goal of this thesis is to design and fabricate a DC-to-DC converter for use in high-voltage capacitor charging applications. The primary objectives include increasing the efficiency and reducing the cost of traditional methods used for this application. Traditional methods were not designed specifically for high-voltage capacitor charging and were thus very primitive and exhibited lower efficiency. Prior methods made use of a high voltage power supply and a current limiting resistor or...
Show moreThe goal of this thesis is to design and fabricate a DC-to-DC converter for use in high-voltage capacitor charging applications. The primary objectives include increasing the efficiency and reducing the cost of traditional methods used for this application. Traditional methods were not designed specifically for high-voltage capacitor charging and were thus very primitive and exhibited lower efficiency. Prior methods made use of a high voltage power supply and a current limiting resistor or control scheme. The power supply would often only operate efficiently at a single voltage value and would thus function poorly over a range used in charging a capacitor. The resistor would also dissipate a fair amount of power, also limiting efficiency. This design makes use of a traditional flyback topology utilizing a controller developed specifically for this application, centering the design approach on the LT3750. Hence, taking full advantage of the efficiency improving control scheme it provides. Additionally, through the use of advanced techniques to eliminate noise and power losses, the efficiency may be significantly improved. A detailed theoretical analysis of the charger is also presented. The analysis will then be applied to optimization techniques to select ideal component values to meet specific design specifications. In this research, a specifically designed and developed prototype will be used to experimentally verify the theoretical work and optimization techniques.
Show less - Date Issued
- 2009
- Identifier
- CFE0002899, ucf:48025
- Format
- Document (PDF)
- PURL
- http://purl.flvc.org/ucf/fd/CFE0002899
- Title
- BST-Inspired Smart Flexible Electronics.
- Creator
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Shen, Ya, Gong, Xun, Wahid, Parveen, Sundaram, Kalpathy, Coffey, Kevin, University of Central Florida
- Abstract / Description
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The advances in modern communication systems have brought about devices with more functionality, better performance, smaller size, lighter weight and lower cost. Meanwhile, the requirement for newer devices has become more demanding than ever. Tunability and flexibility are both long-desired features. Tunable devices are 'smart' in the sense that they can adapt to the dynamic environment or varying user demand as well as correct the minor deviations due to manufacturing fluctuations,...
Show moreThe advances in modern communication systems have brought about devices with more functionality, better performance, smaller size, lighter weight and lower cost. Meanwhile, the requirement for newer devices has become more demanding than ever. Tunability and flexibility are both long-desired features. Tunable devices are 'smart' in the sense that they can adapt to the dynamic environment or varying user demand as well as correct the minor deviations due to manufacturing fluctuations, therefore making it possible to reduce system complexity and overall cost. It is also desired that electronics be flexible to provide conformability and portability.Previously, tunable devices on flexible substrates have been realized mainly by dicing and assembling. This approach is straightforward and easy to carry out. However, it will become a (")mission impossible(") when it comes to assembling a large amount of rigid devices on a flexible substrate. Moreover, the operating frequency is often limited by the parasitic effect of the interconnection between the diced device and the rest of the circuit on the flexible substrate. A recent effort utilized a strain-sharing Si/SiGe/Si nanomembrane to transfer a device onto a flexible substrate. This approach works very well for silicon based devices with small dimensions, such as transistors and varactor diodes. Large-scale fabrication capability is still under investigation.A new transfer technique is proposed and studied in this research. Tunable BST (Barium Strontium Titanate) IDCs (inter-digital capacitors) are first fabricated on a silicon substrate. The devices are then transferred onto a flexible LCP (liquid crystalline polymer) substrate using wafer bonding of the silicon substrate to the LCP substrate, followed by silicon etching. This approach allows for monolithic fabrication so that the transferred devices can operate in millimeter wave frequency. The tunability, capacitance, Q factor and equivalent circuit are studied. The simulated and measured performances are compared. BST capacitors on LCP substrates are also compared with those on sapphire substrates to prove that this transfer process does not impair the performance.A primary study of a reflectarray antenna unit cell is also conducted for loss and phase swing performance. The BST thin film layout and bias line positions are studied in order to reduce the total loss. Transferring a full-size BST-based reflectarray antenna onto an LCP substrate is the ultimate goal, and this work is ongoing at the University of Central Florida (UCF).HFSS is used to simulate the devices and to prove the concept. All of the devices are fabricated in the clean room at UCF. Probe station measurements and waveguide measurements are performed on the capacitors and reflectarray antenna unit cells respectively.This work is the first comprehensive demonstration of this novel transfer technique.
Show less - Date Issued
- 2012
- Identifier
- CFE0004439, ucf:49339
- Format
- Document (PDF)
- PURL
- http://purl.flvc.org/ucf/fd/CFE0004439
- Title
- Advanced Control Techniques for Efficiency and Power Density Improvement of a Three-Phase Microinverter.
- Creator
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Tayebi, Seyed Milad, Batarseh, Issa, Mikhael, Wasfy, Sundaram, Kalpathy, Sun, Wei, Kutkut, Nasser, University of Central Florida
- Abstract / Description
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Inverters are widely used in photovoltaic (PV) based power generation systems. Most of these systems have been based on medium to high power string inverters. Microinverters are gaining popularity over their string inverter counterparts in PV based power generation systems due to maximized energy harvesting, high system reliability, modularity, and simple installation. They can be deployed on commercial buildings, residential rooftops, electric poles, etc and have a huge potential market....
Show moreInverters are widely used in photovoltaic (PV) based power generation systems. Most of these systems have been based on medium to high power string inverters. Microinverters are gaining popularity over their string inverter counterparts in PV based power generation systems due to maximized energy harvesting, high system reliability, modularity, and simple installation. They can be deployed on commercial buildings, residential rooftops, electric poles, etc and have a huge potential market. Emerging trend in power electronics is to increase power density and efficiency while reducing cost. A powerful tool to achieve these objectives is the development of an advanced control system for power electronics. In low power applications such as solar microinverters, increasing the switching frequency can reduce the size of passive components resulting in higher power density. However, switching losses and electromagnetic interference (EMI) may increase as a consequence of higher switching frequency. Soft switching techniques have been proposed to overcome these issues. This dissertation presents several innovative control techniques which are used to increase efficiency and power density while reducing cost. Dynamic dead time optimization and dual zone modulation techniques have been proposed in this dissertation to significantly improve the microinverter efficiency. In dynamic dead time optimization technique, pulse width modulation (PWM) dead times are dynamically adjusted as a function of load current to minimize MOSFET body diode conduction time which reduces power dissipation. This control method also improves total harmonic distortion (THD) of the inverter output current. To further improve the microinverter efficiency, a dual-zone modulation has been proposed which introduces one more soft-switching transition and lower inductor peak current compared to the other boundary conduction mode (BCM) modulation methods.In addition, an advanced DC link voltage control has been proposed to increase the microinverter power density. This concept minimizes the storage capacitance by allowing greater voltage ripple on the DC link. Therefore, the microinverter reliability can be significantly increased by replacing electrolytic capacitors with film capacitors. These control techniques can be readily implemented on any inverter, motor controller, or switching power amplifier. Since there is no circuit modification involved in implementation of these control techniques and can be easily added to existing controller firmware, it will be very attractive to any potential licensees.
Show less - Date Issued
- 2017
- Identifier
- CFE0007136, ucf:52328
- Format
- Document (PDF)
- PURL
- http://purl.flvc.org/ucf/fd/CFE0007136
- Title
- Nonlinear dynamic modeling, simulation and characterization of the mesoscale neuron-electrode interface.
- Creator
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Thakore, Vaibhav, Hickman, James, Mucciolo, Eduardo, Rahman, Talat, Johnson, Michael, Behal, Aman, Molnar, Peter, University of Central Florida
- Abstract / Description
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Extracellular neuroelectronic interfacing has important applications in the fields of neural prosthetics, biological computation and whole-cell biosensing for drug screening and toxin detection. While the field of neuroelectronic interfacing holds great promise, the recording of high-fidelity signals from extracellular devices has long suffered from the problem of low signal-to-noise ratios and changes in signal shapes due to the presence of highly dispersive dielectric medium in the neuron...
Show moreExtracellular neuroelectronic interfacing has important applications in the fields of neural prosthetics, biological computation and whole-cell biosensing for drug screening and toxin detection. While the field of neuroelectronic interfacing holds great promise, the recording of high-fidelity signals from extracellular devices has long suffered from the problem of low signal-to-noise ratios and changes in signal shapes due to the presence of highly dispersive dielectric medium in the neuron-microelectrode cleft. This has made it difficult to correlate the extracellularly recorded signals with the intracellular signals recorded using conventional patch-clamp electrophysiology. For bringing about an improvement in the signal-to-noise ratio of the signals recorded on the extracellular microelectrodes and to explore strategies for engineering the neuron-electrode interface there exists a need to model, simulate and characterize the cell-sensor interface to better understand the mechanism of signal transduction across the interface. Efforts to date for modeling the neuron-electrode interface have primarily focused on the use of point or area contact linear equivalent circuit models for a description of the interface with an assumption of passive linearity for the dynamics of the interfacial medium in the cell-electrode cleft. In this dissertation, results are presented from a nonlinear dynamic characterization of the neuroelectronic junction based on Volterra-Wiener modeling which showed that the process of signal transduction at the interface may have nonlinear contributions from the interfacial medium. An optimization based study of linear equivalent circuit models for representing signals recorded at the neuron-electrode interface subsequently proved conclusively that the process of signal transduction across the interface is indeed nonlinear. Following this a theoretical framework for the extraction of the complex nonlinear material parameters of the interfacial medium like the dielectric permittivity, conductivity and diffusivity tensors based on dynamic nonlinear Volterra-Wiener modeling was developed. Within this framework, the use of Gaussian bandlimited white noise for nonlinear impedance spectroscopy was shown to offer considerable advantages over the use of sinusoidal inputs for nonlinear harmonic analysis currently employed in impedance characterization of nonlinear electrochemical systems. Signal transduction at the neuron-microelectrode interface is mediated by the interfacial medium confined to a thin cleft with thickness on the scale of 20-110 nm giving rise to Knudsen numbers (ratio of mean free path to characteristic system length) in the range of 0.015 and 0.003 for ionic electrodiffusion. At these Knudsen numbers, the continuum assumptions made in the use of Poisson-Nernst-Planck system of equations for modeling ionic electrodiffusion are not valid. Therefore, a lattice Boltzmann method (LBM) based multiphysics solver suitable for modeling ionic electrodiffusion at the mesoscale neuron-microelectrode interface was developed. Additionally, a molecular speed dependent relaxation time was proposed for use in the lattice Boltzmann equation. Such a relaxation time holds promise for enhancing the numerical stability of lattice Boltzmann algorithms as it helped recover a physically correct description of microscopic phenomena related to particle collisions governed by their local density on the lattice. Next, using this multiphysics solver simulations were carried out for the charge relaxation dynamics of an electrolytic nanocapacitor with the intention of ultimately employing it for a simulation of the capacitive coupling between the neuron and the planar microelectrode on a microelectrode array (MEA). Simulations of the charge relaxation dynamics for a step potential applied at t = 0 to the capacitor electrodes were carried out for varying conditions of electric double layer (EDL) overlap, solvent viscosity, electrode spacing and ratio of cation to anion diffusivity. For a large EDL overlap, an anomalous plasma-like collective behavior of oscillating ions at a frequency much lower than the plasma frequency of the electrolyte was observed and as such it appears to be purely an effect of nanoscale confinement. Results from these simulations are then discussed in the context of the dynamics of the interfacial medium in the neuron-microelectrode cleft. In conclusion, a synergistic approach to engineering the neuron-microelectrode interface is outlined through a use of the nonlinear dynamic modeling, simulation and characterization tools developed as part of this dissertation research.
Show less - Date Issued
- 2012
- Identifier
- CFE0004797, ucf:49718
- Format
- Document (PDF)
- PURL
- http://purl.flvc.org/ucf/fd/CFE0004797
