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Title: ANALYSIS AND SIMULATION TOOLS FOR SOLAR ARRAY POWER SYSTEMS.
Creator: Pongratananukul, Nattorn, Kasparis, Takis, University of Central Florida
Abstract / Description: This dissertation presents simulation tools developed specifically for the design of solar array power systems. Contributions are made in several aspects of the system design phases, including solar source modeling, system simulation, and controller verification. A tool to automate the study of solar array configurations using general purpose circuit simulators has been developed based on the modeling of individual solar cells. Hierarchical structure of solar cell elements, including...
Show moreThis dissertation presents simulation tools developed specifically for the design of solar array power systems. Contributions are made in several aspects of the system design phases, including solar source modeling, system simulation, and controller verification. A tool to automate the study of solar array configurations using general purpose circuit simulators has been developed based on the modeling of individual solar cells. Hierarchical structure of solar cell elements, including semiconductor properties, allows simulation of electrical properties as well as the evaluation of the impact of environmental conditions. A second developed tool provides a co-simulation platform with the capability to verify the performance of an actual digital controller implemented in programmable hardware such as a DSP processor, while the entire solar array including the DC-DC power converter is modeled in software algorithms running on a computer. This "virtual plant" allows developing and debugging code for the digital controller, and also to improve the control algorithm. One important task in solar arrays is to track the maximum power point on the array in order to maximize the power that can be delivered. Digital controllers implemented with programmable processors are particularly attractive for this task because sophisticated tracking algorithms can be implemented and revised when needed to optimize their performance. The proposed co-simulation tools are thus very valuable in developing and optimizing the control algorithm, before the system is built. Examples that demonstrate the effectiveness of the proposed methodologies are presented. The proposed simulation tools are also valuable in the design of multi-channel arrays. In the specific system that we have designed and tested, the control algorithm is implemented on a single digital signal processor. In each of the channels the maximum power point is tracked individually. In the prototype we built, off-the-shelf commercial DC-DC converters were utilized. At the end, the overall performance of the entire system was evaluated using solar array simulators capable of simulating various I-V characteristics, and also by using an electronic load. Experimental results are presented.
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Date Issued: 2005
Identifier: CFE0000331, ucf:46290
Format: Document (PDF)
PURL: http://purl.flvc.org/ucf/fd/CFE0000331

Title: BI-DIRECTIONAL DCM DC-TO-DC CONVERTER FOR HYBRID ELECTRIC VEHICLES.
Creator: Pepper, Michael, Batarseh, Issa, University of Central Florida
Abstract / Description: With the recent revival of the hybrid vehicle much advancement in power management has been made. The most popular hybrid vehicle, the hybrid electric vehicle, has many topologies developed to realize this hybrid vehicle. From these topologies, as sub set was created to define a particular group of vehicles where the converter discussed in this thesis has the most advantage. This sub set is defined by two electric sources of power coupled together at a common bus. This set up presents many...
Show moreWith the recent revival of the hybrid vehicle much advancement in power management has been made. The most popular hybrid vehicle, the hybrid electric vehicle, has many topologies developed to realize this hybrid vehicle. From these topologies, as sub set was created to define a particular group of vehicles where the converter discussed in this thesis has the most advantage. This sub set is defined by two electric sources of power coupled together at a common bus. This set up presents many unique operating conditions which can be handled seamlessly by the DC-to-DC converter when designed properly. The DC-to-DC converter discussed in this thesis is operated in Discontinuous Conduction Mode (DCM) of operation because of its unique advantages over the Continuous Conduction Mode (CCM) operated converter. The most relevant being the reduction of size of the magnetic components such as inductor, capacitor and transformers. However, the DC-to-DC converter operated in DCM does not have the inherent capability of bi-directional power flow. This problem can be overcome with a unique digital control technique developed here. The control is developed in a hierarchical fashion to separate the functions required for this sub set of hybrid electric vehicle topologies. This layered approach for the controller allows for the seamless integration of this converter into the vehicle. The first and lowest level of control includes a group of voltage and controller regulators. The average and small signal model of these controllers were developed here to be stable and have a relatively fast recovery time to handle the transient dynamics of the vehicle system. The second level of control commands and organizes the regulators from the first level of control to perform high level task that is more specific to the operation of the vehicle. This level of control is divided into three modes called hybrid boost, hybrid buck and electric vehicle mode. These modes are developed to handle the specific operating conditions found when the vehicle is operated in the specific mode. The third level of control is used to command the second level of control and is left opened via a communication area network (CAN) bus controller. This level of control is intended to come from the vehicle's system controller. Because the DC-to-DC converter is operated in DCM, this introduces added voltage ripple on the output voltage as well as higher current ripple demand from the input voltage. Since this is generally undesirable, the converter is split into three phases and properly interleaved. The interleaving operation is used to counteract the effects of the added voltage and current ripple. Finally, a level of protection is added to protect the converter and surrounding components from harm. All protection is designed and implemented digitally in DSP.
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Date Issued: 2008
Identifier: CFE0002496, ucf:47676
Format: Document (PDF)
PURL: http://purl.flvc.org/ucf/fd/CFE0002496

Title: High Performance Low Voltage Power MOSFET for High-Frequency Synchronous Buck Converters.
Creator: Yang, Boyi, Shen, Zheng, Yuan, Jiann-Shiun, Sundaram, Kalpathy, Wu, Xinzhang, Xu, Shuming, University of Central Florida
Abstract / Description: Power management solutions such as voltage regulator (VR) mandate DC-DC converters with high power density, high switching frequency and high efficiency to meet the needs of future computers and telecom equipment. The trend towards DC-DC converters with higher switching frequency presents significant challenges to power MOSFET technology. Optimization of the MOSFETs plays an important role in improving low-voltage DC-DC converter performance. This dissertation focuses on developing and...
Show morePower management solutions such as voltage regulator (VR) mandate DC-DC converters with high power density, high switching frequency and high efficiency to meet the needs of future computers and telecom equipment. The trend towards DC-DC converters with higher switching frequency presents significant challenges to power MOSFET technology. Optimization of the MOSFETs plays an important role in improving low-voltage DC-DC converter performance. This dissertation focuses on developing and optimizing high performance low voltage power MOSFETs for high frequency applications.With an inherently large gate charge, the trench MOSFET suffers significant switching power losses and cannot continue to provide sufficient performance in high frequency applications. Moreover, the influence of parasitic impedance introduced by device packaging and PCB assembly in board level power supply designs becomes more pronounced as the output voltage continues to decrease and the nominal current continues to increase. This eventually raises the need for highly integrated solutions such as power supply in package (PSiP) or on chip (PSoC). However, it is often more desirable in some PSiP architectures to reverse the source/drain electrodes from electrical and/or thermal point of view. In this dissertation, a stacked-die Power Block PSiP architecture is first introduced to enable DC-DC buck converters with a current rating up to 40 A and a switching frequency in the MHz range. New high- and low-side NexFETs are specially designed and optimized for the new PSiP architecture to maximize its efficiency and power density. In particular, a new NexFET structure with its source electrode on the bottom side of the die (source-down) is designed to enable the innovative stacked-die PSiP technology with significantly reduced parasitic inductance and package footprint.It is also observed that in synchronous buck converter very fast switching of power MOSFETs sometimes leads to high voltage oscillations at the phase node of the buck converter, which may introduce additional power loss and cause EMI related problems and undesirable electrical stress to the power MOSFET. At the same time, the synchronous MOSFET plays an important role in determining the performance of the synchronous buck converter. The reverse recovery of its body diode and the Cdv/dt induced false trigger-on are two major mechanisms that impact the performance of the SyncFET. This dissertation introduces a new approach to effectively overcome the aforementioned challenges associated with the state-of-art technology. The threshold voltage of the low-side NexFET is intentionally reduced to minimize the conduction and body diode related power losses. Meanwhile, a monolithically integrated gate voltage pull-down circuitry is proposed to overcome the possible Cdv/dt induced turn-on issue inadvertently induced by the low VTH SynFET.Through extensive modeling and simulation, all these innovative concepts are integrated together in a power module and fabricated with a 0.35(&)#181;m process. With all these novel device technology improvements, the new power module delivers a significant improvement in efficiency and offers an excellent solution for future high frequency, high current density DC-DC converters. Megahertz operation of a Power Block incorporating these new device techniques is demonstrated with an excellent efficiency observed.
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Date Issued: 2012
Identifier: CFE0004642, ucf:49885
Format: Document (PDF)
PURL: http://purl.flvc.org/ucf/fd/CFE0004642

Title: TRANSIENT RESPONSE IMPROVEMENT FOR MULTI-PHASE VOLTAGE REGULATORS.
Creator: Xiao, Shangyang, Batarseh, Issa, University of Central Florida
Abstract / Description: Next generation microprocessor (Vcore) requirements for high current slew rates and fast transient response together with low output voltage have posed great challenges on voltage regulator (VR) design . Since the debut of Intel 80X86 series, CPUs have greatly improved in performance with a dramatic increase on power consumption. According to the latest Intel VR11 design guidelines , the operational current may ramp up to 140A with typical voltages in the 1.1V to 1.4V range, while the slew...
Show moreNext generation microprocessor (Vcore) requirements for high current slew rates and fast transient response together with low output voltage have posed great challenges on voltage regulator (VR) design . Since the debut of Intel 80X86 series, CPUs have greatly improved in performance with a dramatic increase on power consumption. According to the latest Intel VR11 design guidelines , the operational current may ramp up to 140A with typical voltages in the 1.1V to 1.4V range, while the slew rate of the transient current can be as high as 1.9A/ns [1, 2]. Meanwhile, the transient-response requirements are becoming stringer and stringer. This dissertation presents several topics on how to improve transient response for multi-phase voltage regulators. The Adaptive Modulation Control (AMC) is a type of non-linear control method which has proven to be effective in achieving high bandwidth designs as well as stabilizing the control loop during large load transients. It adaptively adjusts control bandwidth by changing the modulation gain, depending on different load conditions. With the AMC, a multiphase voltage regulator can be designed with an aggressively high bandwidth. When in heavy load transients where the loop could be potentially unstable, the bandwidth is lowered. Therefore, the AMC provides an optimal means for robust high-bandwidth design with excellent transient performance. The Error Amplifier Voltage Positioning (EAVP) is proposed to improve transient response by removing undesired spikes and dips after initial transient response. The EAVP works only in a short period of time during transient events without modifying the power stage and changing the control loop gain. It facilitates the error amplifier voltage recovering during transient events, achieving a fast settling time without impact on the whole control loop. Coupled inductors are an emerging topology for computing power supplies as VRs with coupled inductors show dynamic and steady-state advantages over traditional VRs. This dissertation first covers the coupling mechanism in terms of both electrical and reluctance modeling. Since the magnetizing inductance plays an important role in the coupled-inductor operation, a unified State-Space Averaging model is then built for a two-phase coupled-inductor voltage regulator. The DC solutions of the phase currents are derived in order to show the impact of the magnetizing inductance on phase current balancing. A small signal model is obtained based on the state-space-averaging model. The effects of magnetizing inductance on dynamic performance are presented. The limitations of conventional DCR current-sensing for coupled inductors are addressed. Traditional inductor DCR current sensing topology and prior arts fail to extract phase currents for coupled inductors. Two new DCR current sensing topologies for coupled inductors are presented in this dissertation. By implementation of simple RC networks, the proposed topologies can preserve the coupling effect between phases. As a result, accurate phase inductor currents and total current can be sensed, resulting in excellent current and voltage regulation. While coupled-inductor topologies are showing advantages in transient response and are becoming industry practices, they are suffering from low steady-state operating efficiency. Motivated by the challenging transient and efficiency requirements, this dissertation proposes a Full Bridge Coupled Inductor (FBCI) scheme which is able to improve transient response as well as savor high efficiency at (a) steady state. The FBCI can change the circuit configuration under different operational conditions. Its "flexible" topology is able to optimize both transient response and steady-state efficiency. The flexible core configuration makes implementation easy and clear of IP issues. A novel design methodology for planar magnetics based on numerical analysis of electromagnetic fields is offered and successfully applied to the design of low-voltage high power density dc-dc converters. The design methodology features intense use of FEM simulation. The design issues of planar magnetics, including loss mechanism in copper and core, winding design on PCB, core selections, winding arrangements and so on are first reviewed. After that, FEM simulators are introduced to numerically compute the core loss and winding loss. Consequently, a software platform for magnetics design is established, and optimized magnetics can then be achieved. Dynamic voltage scaling (DVS) technology is a common industry practice in optimizing power consumption of microprocessors by dynamically altering the supply voltage under different operational modes, while maintaining the performance requirements. During DVS operation, it is desirable to position the output voltage to a new level commanded by the microprocessor (CPU) with minimum delay. However, voltage deviation and slow settling time usually exist due to large output capacitance and compensation delay in voltage regulators. Although optimal DVS can be achieved by modifying the output capacitance and compensation, this method is limited by constraints from stringent static and dynamic requirements. In this dissertation, the effects of output capacitance and compensation network on DVS operation are discussed in detail. An active compensator scheme is then proposed to ensure smooth transition of the output voltage without change of power stage and compensation during DVS. Simulation and experimental results are included to demonstrate the effectiveness of the proposed scheme.
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Date Issued: 2008
Identifier: CFE0002397, ucf:47738
Format: Document (PDF)
PURL: http://purl.flvc.org/ucf/fd/CFE0002397

Title: UNIFIED LARGE AND SMALL SIGNAL STATE-SPACE BASED MODELING AND SYMBOLIC SIMULATION FOR PWM CONVERTERS.
Creator: Shoubaki, Ehab, Batarseh, Issa, University of Central Florida
Abstract / Description: In this Dissertation, which concentrates on discrete modeling for control purposes of DC/DC converters and simulation through symbolic techniques. A Unified Discrete State-Space Model for power converters in CCM is presented. Two main approaches to arriving at the discrete model are used. The first approach involves an impulse function approximation of the duty cycle modulation of the converter switches, and this approach results in a small signal discrete model. The Second approach is direct...
Show moreIn this Dissertation, which concentrates on discrete modeling for control purposes of DC/DC converters and simulation through symbolic techniques. A Unified Discrete State-Space Model for power converters in CCM is presented. Two main approaches to arriving at the discrete model are used. The first approach involves an impulse function approximation of the duty cycle modulation of the converter switches, and this approach results in a small signal discrete model. The Second approach is direct and does not involve any approximation of the modulation, this approach yields both a large signal nonlinear discrete model and a linear small signal model. Harmonic analysis of the converter's states at steady-state is done for steady-state waveform acquisition, which increases the accuracy of the model especially for finding the control to inductor current frequency response. Also the harmonic Analysis technique is used to both obtain the response of the converter to a load transient and to finding the optimal duty cycle response that minimizes the disturbance. Finally the Discrete model is verified for the Half-Bridge DC/DC topology for its three main control schemes (Asymmetric, Symmetric, DCS). A GUI platform in MATLAB is presented as a wrapper that utilizes the models and analysis presented in this thesis. Symbolic simulation techniques are developed in general manner for linear piecewise circuits and then through State-Space formalism specialized for DC/DC converters. A general symbolic solver programmed in JAVA that implements said techniques is presented.
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Date Issued: 2009
Identifier: CFE0002836, ucf:48061
Format: Document (PDF)
PURL: http://purl.flvc.org/ucf/fd/CFE0002836

Title: Dynamic modeling of pwm and single-switch single-stage power factor correction converters.
Creator: Zhu, Guangyong, Batarseh, Issa E., Engineering
Abstract / Description: University of Central Florida College of Engineering Thesis; The concept of averaging has been used extensively in the modeling of power electronic circuits to overcome their inherent time-variant nature. Among various methods, the PWM switch modeling approach is most widely accepted in the study of closed-loop stability and transient response because of its accuracy and simplicity. However, a non-ideal PWM switch model considering conduction losses is not available except for converters...
Show moreUniversity of Central Florida College of Engineering Thesis; The concept of averaging has been used extensively in the modeling of power electronic circuits to overcome their inherent time-variant nature. Among various methods, the PWM switch modeling approach is most widely accepted in the study of closed-loop stability and transient response because of its accuracy and simplicity. However, a non-ideal PWM switch model considering conduction losses is not available except for converters operating in continuous conduction mode (CCM) and under small ripple conditions. Modeling of conductor losses under large ripple conditions has not been reported in the open literature, especially when the converter operates in discontinuous conduction mode (DCM). In this dissertation, new models are developed to include conduction losses in the non-ideal PWM switch model under CCM and DCM conditions. The developed model is verified through two converter examples and the effect of conduction losses on the steady state and dynamic responses of the converter is also studied. Another major constraint of the PWM switch modeling approach is that it heavily relies on finding the three-terminal PWM switch. This requirement severely limits its application in modeling single-switch single-stage power factor correction (PFC) converters, where more complex topological structures and switching actions are often encountered. In this work, we developed a new modeling approach which extends the PWM switch concept by identifying the charging and discharging voltages applied to the inductors. The new method can be easily applied to derive large-signal models for a large group of PFC converters and the procedure is elaborated through a specific example. Finally, analytical results regarding harmonic contents and power factors of various PWM converters in PFC applications are also presented here.
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Date Issued: 1999
Identifier: CFR0001716, ucf:52925
Format: Document (PDF)
PURL: http://purl.flvc.org/ucf/fd/CFR0001716

Title: HIGH TEMPERATURE PACKAGING FOR WIDE BANDGAP SEMICONDUCTOR DEVICES.
Creator: Grummel, Brian, Shen, Z. John, University of Central Florida
Abstract / Description: Currently, wide bandgap semiconductor devices feature increased efficiency, higher current handling capabilities, and higher reverse blocking voltages than silicon devices while recent fabrication advances have them drawing near to the marketplace. However these new semiconductors are in need of new packaging that will allow for their application in several important uses including hybrid electrical vehicles, new and existing energy sources, and increased efficiency in multiple new and...
Show moreCurrently, wide bandgap semiconductor devices feature increased efficiency, higher current handling capabilities, and higher reverse blocking voltages than silicon devices while recent fabrication advances have them drawing near to the marketplace. However these new semiconductors are in need of new packaging that will allow for their application in several important uses including hybrid electrical vehicles, new and existing energy sources, and increased efficiency in multiple new and existing technologies. Also, current power module designs for silicon devices are rife with problems that must be enhanced to improve reliability. This thesis introduces new packaging that is thermally resilient and has reduced mechanical stress from temperature rise that also provides increased circuit lifetime and greater reliability for continued use to 300°C which is within operation ratings of these new semiconductors. The new module is also without problematic wirebonds that lead to a majority of traditional module failures which also introduce parasitic inductance and increase thermal resistance. Resultantly, the module also features a severely reduced form factor in mass and volume.
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Date Issued: 2008
Identifier: CFE0002482, ucf:47690
Format: Document (PDF)
PURL: http://purl.flvc.org/ucf/fd/CFE0002482

Title: MAXIMUM ENERGY HARVESTING CONTROL FOROSCILLATING ENERGY HARVESTING SYSTEMS.
Creator: Elmes, John, Batarseh, Issa, University of Central Florida
Abstract / Description: This thesis presents an optimal method of designing and controlling an oscillating energy harvesting system. Many new and emerging energy harvesting systems, such as the energy harvesting backpack and ocean wave energy harvesting, capture energy normally expelled through mechanical interactions. Often the nature of the system indicates slow system time constants and unsteady AC voltages. This paper reveals a method for achieving maximum energy harvesting from such sources with fast...
Show moreThis thesis presents an optimal method of designing and controlling an oscillating energy harvesting system. Many new and emerging energy harvesting systems, such as the energy harvesting backpack and ocean wave energy harvesting, capture energy normally expelled through mechanical interactions. Often the nature of the system indicates slow system time constants and unsteady AC voltages. This paper reveals a method for achieving maximum energy harvesting from such sources with fast determination of the optimal operating condition. An energy harvesting backpack, which captures energy from the interaction between the user and the spring decoupled load, is presented in this paper. The new control strategy, maximum energy harvesting control (MEHC), is developed and applied to the energy harvesting backpack system to evaluate the improvement of the MEHC over the basic maximum power point tracking algorithm.
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Date Issued: 2007
Identifier: CFE0001822, ucf:47345
Format: Document (PDF)
PURL: http://purl.flvc.org/ucf/fd/CFE0001822

Title: CONTROL STRATEGY FOR MAXIMIZING POWER CONVERSION EFFICIENCY AND EFFECTIVENESS OF THREE PORT SOLAR CHARGING STATION FOR ELECTRIC VEHICLES.
Creator: Hamilton, Christopher, Batarseh, Issa, University of Central Florida
Abstract / Description: Recent trends in the energy sector have provided opportunities in the research of alternative energy sources and optimization of systems that harness these energy sources. With the rising cost of fossil fuel and rising concern about detrimental effects that fossil fuel consumption has on the environment, electric vehicles are becoming more prevalent. A study put out in 2009 gives a prediction that in the year 2025, 20% of new vehicles will be PHEVs. As energy providers become more concerned...
Show moreRecent trends in the energy sector have provided opportunities in the research of alternative energy sources and optimization of systems that harness these energy sources. With the rising cost of fossil fuel and rising concern about detrimental effects that fossil fuel consumption has on the environment, electric vehicles are becoming more prevalent. A study put out in 2009 gives a prediction that in the year 2025, 20% of new vehicles will be PHEVs. As energy providers become more concerned about a growing population and diminishing energy source, they are looking into alternative energy sources such as wind and solar power. Much of this is done on a large scale with vast amounts of land used for solar or wind farms to provide energy to the grid. However, as population grows, requirements of the physical components of a power transmission system will become more demanding and the need for remote micro-grids will become more prevalent. Micro-grids are essentially smaller subsystems of a distribution system that provide power to a confined group of loads, or households. Using the idea of micro grid technology, a solar charging station can be used as a source to provide energy for the immediate surroundings, or also to electric vehicles that are demanding energy from the panels. Solar charging stations are becoming very popular, however the need for improvement and optimization of these systems is needed. This thesis will present a method for redesigning the overall architecture of the controls and power electronics of typical carports so that efficiency, reliability and modularity are achieved. Specifically, a typical carport, as seen commonly today, has been built on the University of Central Florida campus in Orlando. This carport was designed in such a way that shifting from conventional charging methods is made easy while preserving the fundamental requirements of a practical solar carport.
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Date Issued: 2010
Identifier: CFE0003490, ucf:48954
Format: Document (PDF)
PURL: http://purl.flvc.org/ucf/fd/CFE0003490

Title: COMPARISON OF SINGLE STAGE AND TWO STAGE STAGE GRID-TIE INVERTERS.
Creator: Mansfield, Keith, Batarseh, Issa, University of Central Florida
Abstract / Description: This thesis compares two methods of designing grid-tie inverters. The first design topology is a traditional two stage approach consisting of an isolated DC-DC converter on the input followed by a high switching frequency SPWM (Sinusoidal Pulse Width Modulation) stage to produce the required low frequency sine wave output. The novel second design approach employs a similar DC-DC input stage capable of being modulated to provide a rectified sine wave output voltage/current waveform. This stage...
Show moreThis thesis compares two methods of designing grid-tie inverters. The first design topology is a traditional two stage approach consisting of an isolated DC-DC converter on the input followed by a high switching frequency SPWM (Sinusoidal Pulse Width Modulation) stage to produce the required low frequency sine wave output. The novel second design approach employs a similar DC-DC input stage capable of being modulated to provide a rectified sine wave output voltage/current waveform. This stage is followed by a simple low frequency switched Unfolding Stage to recreate the required sine wave output. Both of the above designs have advantages and disadvantages depending on operating parameters. The following work will compare the Unfolding Output Stage and the SPWM Output Stage at various power levels and power densities. Input stage topologies are similarly examined in order to determine the best design approach for each output stage under consideration.
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Date Issued: 2007
Identifier: CFE0001783, ucf:47258
Format: Document (PDF)
PURL: http://purl.flvc.org/ucf/fd/CFE0001783

Title: INTEGRATED TOPOLOGIES AND DIGITAL CONTROL FOR SATELLITE POWER MANAGEMENT AND DISTRIBUTION SYSTEMS.
Creator: Al-Atrash, Hussam, Batarseh, Issa, University of Central Florida
Abstract / Description: This work is focused on exploring advanced solutions for space power management and distribution (PMAD) systems. As spacecraft power requirements continue to increase, paralleled by the pressures for reducing cost and overall system weight, power electronics engineers will continue to face major redesigns of the space power systems in order to meet such challenges. Front-end PMAD systems, used to interface the solar sources and battery backup to the distribution bus, need to be designed with...
Show moreThis work is focused on exploring advanced solutions for space power management and distribution (PMAD) systems. As spacecraft power requirements continue to increase, paralleled by the pressures for reducing cost and overall system weight, power electronics engineers will continue to face major redesigns of the space power systems in order to meet such challenges. Front-end PMAD systems, used to interface the solar sources and battery backup to the distribution bus, need to be designed with increased efficiency, reliability, and power density. A new family of integrated single-stage power converter structures is introduced here. This family allows the interface and control of multiple power sources and storage devices in order to optimize utilization of available resources. Employing single-stage power topologies, these converters control power flow efficiently and cost-effectively. This is achieved by modifying the operation and control strategies of isolated soft-switched half-bridge and full-bridge converters--two of the most popular two-port converter topologies. These topologies are reconfigured and utilized to realize three power processing paths. These paths simultaneously utilize the power devices, allowing increased functionality while promising reduced losses and enhanced power densities. Each of the proposed topologies is capable of performing simultaneous control of two of its three ports. Control objectives include battery or ultra-capacitor charge regulation, solar array maximum power point tracking (MPPT), and/or bus voltage regulation. Another advantage of the proposed power structure is that current engineering design concepts can be used to optimize the new topologies in a fashion similar to the mother topologies. This includes component selection and magnetic design procedures, as well as achieving soft-switching for increased efficiency at higher switching frequencies. Galvanic isolation of the load port through high-frequency transformers provides design flexibility for high step-up/step-down conversion ratios. It further allows the converters to be used as power electronics building blocks (PEBB) with outputs connected in different series/parallel combinations to meet different load requirements. Utilizing such converters promises significant savings in size, weight, and costs of the power management system as well as the devices it manages. Chapter 1 of this dissertation provides an introduction to the requirements, challenges, and trends of space PMAD. A review of existing multi-port converter technologies and digital control techniques is given in Chapter 2. Chapter 3 discusses different PMAD system architectures. It outlines the basic concepts used for PMAD integration and discusses the potential for improvement. Chapters 4 and 5 present and discuss the operation and characteristics of three different integrated multi-port converters. Chapter 6 presents improved methods for practical digital control of switching converters, which are especially useful in complex multi-objective controllers used for PMAD. This is followed by conclusions and suggested future work.
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Date Issued: 2007
Identifier: CFE0001784, ucf:47283
Format: Document (PDF)
PURL: http://purl.flvc.org/ucf/fd/CFE0001784

Title: HIGH-DENSITY AND HIGH-EFFICIENCY SOFT SWITCHING MODULAR BI-DIRECTIONAL DC-DC CONVERTER FOR HYBRID ELECTRIC VEHICLES.
Creator: Elmes, John, Batarseh, Issa, University of Central Florida
Abstract / Description: This dissertation presents the design of a high-density and high-efficiency soft-switching bi-directional DC-DC converter for hybrid-electric vehicles. The converter operates in a new bi-directional interleaved variable-frequency quasi-square-wave (QSW) mode, which enables high efficiency, high switching frequency, and high power-density. The converter presented utilizes a new variable frequency interleaving approach which allows for each module to operate in an interleaved position while...
Show moreThis dissertation presents the design of a high-density and high-efficiency soft-switching bi-directional DC-DC converter for hybrid-electric vehicles. The converter operates in a new bi-directional interleaved variable-frequency quasi-square-wave (QSW) mode, which enables high efficiency, high switching frequency, and high power-density. The converter presented utilizes a new variable frequency interleaving approach which allows for each module to operate in an interleaved position while allowing for tolerance in inductance and snubber capacitor values. The variable frequency interleaved soft-switching operation paired with a high-density nanocrystalline inductor and high-density system structure results in a very high performance converter, well exceeding that of the current technology. The developed converter is intended to achieve three specific performance goals: high conversion efficiency, high power density, and operation with 100 ÃƒÂƒÃ‚Â‚ÃƒÂ‚Ã‚Â°C coolant. Two markedly different converter prototype designs are presented, one converter using evaporative spray cooling to cool the switching devices, with the second converter using a more traditional coldplate design to cool the switching devices. The 200 kW (25 kW per module) prototype converters exhibited power density greater than 8 kilowatts/liter (kW/L), and peak efficiency over 98%, while operating with 100 ÃƒÂƒÃ‚Â‚ÃƒÂ‚Ã‚Â°C coolant.
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Date Issued: 2010
Identifier: CFE0003366, ucf:48436
Format: Document (PDF)
PURL: http://purl.flvc.org/ucf/fd/CFE0003366

Title: Control Based Soft Switching Three-phase Micro-inverter: Efficiency and Power Density Optimization.
Creator: Amirahmadi, Ahmadreza, Batarseh, Issa, Lotfifard, Saeed, Mikhael, Wasfy, Wu, Xinzhang, Kutkut, Nasser, University of Central Florida
Abstract / Description: In the field of renewable energy, solar photovoltaic is growing exponentially. Grid-tied PV micro-inverters have become the trend for future PV system development because of their remarkable advantages such as enhanced energy production due to MPPT implementation for each PV panel, high reliability due to redundant and distributed system architecture, and simple design, installation, and management due to its plug-and-play feature. Conventional approaches for the PV micro-inverters are mainly...
Show moreIn the field of renewable energy, solar photovoltaic is growing exponentially. Grid-tied PV micro-inverters have become the trend for future PV system development because of their remarkable advantages such as enhanced energy production due to MPPT implementation for each PV panel, high reliability due to redundant and distributed system architecture, and simple design, installation, and management due to its plug-and-play feature. Conventional approaches for the PV micro-inverters are mainly in the form of single-phase grid connected and they aim at the residential and commercial rooftop applications. It would be advantageous to extend the micro-inverter concept to large size PV installations such as MW-class solar farms where three-phase AC connections are used.The relatively high cost of the three-phase micro-inverter is the biggest barrier to its large scale deployment. Increasing the switching frequency may be the best way to reduce cost by shrinking the size of reactive components and heat-sink. However, this approach could cause conversion efficiency to drop dramatically without employing soft switching techniques or using costly new devices.This dissertation presents a new zero voltage switching control method that is suitable for low power applications such as three-phase micro-inverters. The proposed hybrid boundary conduction mode (BCM) current control method increases the efficiency and power density of the micro-inverters and features both reduced number of components and easy digital implementation. Zero voltage switching is achieved by controlling the inductor current bi-directional in every switching cycle and results in lower switching losses, higher operating frequency, and reduced size and cost of passive components, especially magnetic cores. Some practical aspects of hybrid control implementation such as dead-time insertion can degrade the performance of the micro-inverter. A dead-time compensation method that improves the performance of hybrid BCM current control by decreasing the output current THD and reducing the zero crossing distortion is presented.Different BCM ZVS current control modulation schemes are compared based on power losses breakdown, switching frequency range, and current quality. Compared to continuous conduction mode (CCM) current control, BCM ZVS control decreases MOSFET switching losses and filter inductor conduction losses but increases MOSFET conduction losses and inductor core losses. Based on the loss analysis, a dual-mode current modulation method combining ZVS and zero current switching (ZCS) schemes is proposed to improve the efficiency of the micro-inverter.Finally, a method of maintaining high power conversion efficiency across the entire load range of the three-phase micro-inverter is proposed. The proposed control method substantially increases the conversion efficiency at light loads by minimizing switching losses of semiconductor devices as well as core losses of magnetic components. This is accomplished by entering a phase skipping operating mode wherein two phases of an inverter are disabled and three inverters are combined to form a new three-phase system with minimal grid imbalance. A 400W prototype of a three-phase micro-inverter and its hybrid control system have been designed and tested under different conditions to verify the effectiveness of the proposed controller, current modulation scheme, and light load efficiency enhancement method.
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Date Issued: 2014
Identifier: CFE0005125, ucf:50703
Format: Document (PDF)
PURL: http://purl.flvc.org/ucf/fd/CFE0005125

Title: rf power amplifier and oscillator design for reliability and variability.
Creator: Chen, Shuyu, Yuan, Jiann-Shiun, Sundaram, Kalpathy, Shen, Zheng, Gong, Xun, Wang, Morgan, University of Central Florida
Abstract / Description: CMOS RF circuit design has been an ever-lasting research field. It gained so much attention since RF circuits have high mobility and wide band efficiency, while CMOS technology has the advantage of low cost and better capability of integration. At the same time, IC circuits never stopped scaling down for the recent many decades. Reliability issues with RF circuits have become more and more severe with device scaling down: reliability effects such as gate oxide break down, hot carrier...
Show moreCMOS RF circuit design has been an ever-lasting research field. It gained so much attention since RF circuits have high mobility and wide band efficiency, while CMOS technology has the advantage of low cost and better capability of integration. At the same time, IC circuits never stopped scaling down for the recent many decades. Reliability issues with RF circuits have become more and more severe with device scaling down: reliability effects such as gate oxide break down, hot carrier injection, negative bias temperature instability, have been amplified as the device size shrinks. Process variability issues also become more predominant as the feature size decreases. With these insights provided, reliability and variability evaluations on typical RF circuits and possible compensation techniques are highly desirable.In this work, a class E power amplifier is designed and laid out using TSMC 0.18 (&)#181;m RF technology and the chip was fabricated. Oxide stress and hot electron tests were carried out at elevated supply voltage, fresh measurement results were compared with different stress conditions after 10 hours. Test results matched very well with mixed mode circuit simulations, proved that hot carrier effects degrades PA performances like output power, power efficiency, etc. Self- heating effects were examined on a class AB power amplifier since PA has high power operations. Device temperature simulation was done both in DC and mixed mode level. Different gate biasing techniques were analyzed and their abilities to compensate output power were compared. A simple gate biasing circuit turned out to be efficient to compensate self-heating effects under different localized heating situations. Process variation was studied on a classic Colpitts oscillator using Monte-Carlo simulation. Phase noise was examined since it is a key parameter in oscillator. Phase noise was modeled using analytical equations and supported by good match between MATLAB results and ADS simulation. An adaptive body biasing circuit was proposed to eliminate process variation. Results from probability density function simulation demonstrated its capability to relieve process variation on phase noise. Standard deviation of phase noise with adaptive body bias is much less than the one without compensation. Finally, a robust, adaptive design technique using PLL as on-chip sensor to reduce Process, Voltage, Temperature (P.V.T.) variations and other aging effects on RF PA was evaluated. The frequency and phase of ring oscillator need to be adjusted to follow the frequency and phase of input in PLL no matter how the working condition varies. As a result, the control signal of ring oscillator has to fluctuate according to the working condition, reflecting the P.V.T changes. RF circuits suffer from similar P.V.T. variations. The control signal of PLL is introduced to RF circuits and converted to the adaptive tuning voltage for substrate bias. Simulation results illustrate that the PA output power under different variations is more flat than the one with no compensation. Analytical equations show good support to what has been observed.
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Date Issued: 2013
Identifier: CFE0004664, ucf:49894
Format: Document (PDF)
PURL: http://purl.flvc.org/ucf/fd/CFE0004664

Title: FINITE ELEMENT METHOD MODELING OF ADVANCED ELECTRONIC DEVICES.
Creator: Chen, Yupeng, Wu, Thomas, University of Central Florida
Abstract / Description: In this dissertation, we use finite element method together with other numerical techniques to study advanced electron devices. We study the radiation properties in electron waveguide structure with multi-step discontinuities and soft wall lateral confinement. Radiation mechanism and conditions are examined by numerical simulation of dispersion relations and transport properties. The study of geometry variations shows its significant impact on the radiation intensity and direction. In...
Show moreIn this dissertation, we use finite element method together with other numerical techniques to study advanced electron devices. We study the radiation properties in electron waveguide structure with multi-step discontinuities and soft wall lateral confinement. Radiation mechanism and conditions are examined by numerical simulation of dispersion relations and transport properties. The study of geometry variations shows its significant impact on the radiation intensity and direction. In particular, the periodic corrugation structure exhibits strong directional radiation. This interesting feature may be useful to design a nano-scale transmitter, a communication device for future nano-scale system. Non-quasi-static effects in AC characteristics of carbon nanotube field-effect transistors are examined by solving a full time-dependent, open-boundary Schrödinger equation. The non-quasi-static characteristics, such as the finite channel charging time, and the dependence of small signal transconductance and gate capacitance on the frequency, are explored. The validity of the widely used quasi-static approximation is examined. The results show that the quasi-static approximation overestimates the transconductance and gate capacitance at high frequencies, but gives a more accurate value for the intrinsic cut-off frequency over a wide range of bias conditions. The influence of metal interconnect resistance on the performance of vertical and lateral power MOSFETs is studied. Vertical MOSFETs in a D2PAK and DirectFET package, and lateral MOSFETs in power IC and flip chip are investigated as the case studies. The impact of various layout patterns and material properties on RDS(on) will provide useful guidelines for practical vertical and lateral power MOSFETs design.
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Date Issued: 2006
Identifier: CFE0001389, ucf:46987
Format: Document (PDF)
PURL: http://purl.flvc.org/ucf/fd/CFE0001389

Title: CMOS RF CITUITS VARIABILITY AND RELIABILITY RESILIENT DESIGN, MODELING, AND SIMULATION.
Creator: Liu, Yidong, Yuan, Jiann-Shiun, University of Central Florida
Abstract / Description: The work presents a novel voltage biasing design that helps the CMOS RF circuits resilient to variability and reliability. The biasing scheme provides resilience through the threshold voltage (VT) adjustment, and at the mean time it does not degrade the PA performance. Analytical equations are established for sensitivity of the resilient biasing under various scenarios. Power Amplifier (PA) and Low Noise Amplifier (LNA) are investigated case by case through modeling and experiment. PTM 65nm...
Show moreThe work presents a novel voltage biasing design that helps the CMOS RF circuits resilient to variability and reliability. The biasing scheme provides resilience through the threshold voltage (VT) adjustment, and at the mean time it does not degrade the PA performance. Analytical equations are established for sensitivity of the resilient biasing under various scenarios. Power Amplifier (PA) and Low Noise Amplifier (LNA) are investigated case by case through modeling and experiment. PTM 65nm technology is adopted in modeling the transistors within these RF blocks. A traditional class-AB PA with resilient design is compared the same PA without such design in PTM 65nm technology. Analytical equations are established for sensitivity of the resilient biasing under various scenarios. A traditional class-AB PA with resilient design is compared the same PA without such design in PTM 65nm technology. The results show that the biasing design helps improve the robustness of the PA in terms of linear gain, P1dB, Psat, and power added efficiency (PAE). Except for post-fabrication calibration capability, the design reduces the majority performance sensitivity of PA by 50% when subjected to threshold voltage (VT) shift and 25% to electron mobility (¼n) degradation. The impact of degradation mismatches is also investigated. It is observed that the accelerated aging of MOS transistor in the biasing circuit will further reduce the sensitivity of PA. In the study of LNA, a 24 GHz narrow band cascade LNA with adaptive biasing scheme under various aging rate is compared to LNA without such biasing scheme. The modeling and simulation results show that the adaptive substrate biasing reduces the sensitivity of noise figure and minimum noise figure subject to process variation and device aging such as threshold voltage shift and electron mobility degradation. Simulation of different aging rate also shows that the sensitivity of LNA is further reduced with the accelerated aging of the biasing circuit. Thus, for majority RF transceiver circuits, the adaptive body biasing scheme provides overall performance resilience to the device reliability induced degradation. Also the tuning ability designed in RF PA and LNA provides the circuit post-process calibration capability.
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Date Issued: 2011
Identifier: CFE0003595, ucf:48861
Format: Document (PDF)
PURL: http://purl.flvc.org/ucf/fd/CFE0003595

Title: INVESTIGATION OF PS-PVD AND EB-PVD THERMAL BARRIER COATINGS OVER LIFETIME USING SYNCHROTRON X-RAY DIFFRACTION.
Creator: Northam, Matthew, Raghavan, Seetha, Ghosh, Ranajay, Vaidyanathan, Raj, University of Central Florida
Abstract / Description: Extreme operating temperatures within the turbine section of jet engines require sophisticated methods of cooling and material protection. Thermal barrier coatings (TBCs) achieve this through a ceramic coating applied to a substrate material (nickel-based superalloy). Electron-beam physical vapor deposition (EB-PVD) is the industry standard coating used on jet engines. By tailoring the microstructure of an emerging deposition method, Plasma-spray physical vapor deposition (PS-PVD), similar...
Show moreExtreme operating temperatures within the turbine section of jet engines require sophisticated methods of cooling and material protection. Thermal barrier coatings (TBCs) achieve this through a ceramic coating applied to a substrate material (nickel-based superalloy). Electron-beam physical vapor deposition (EB-PVD) is the industry standard coating used on jet engines. By tailoring the microstructure of an emerging deposition method, Plasma-spray physical vapor deposition (PS-PVD), similar microstructures to that of EB-PVD coatings can be fabricated, allowing the benefits of strain tolerance to be obtained while improving coating deposition times. This work investigates the strain through depth of uncycled and cycled samples using these coating techniques with synchrotron X-ray diffraction (XRD). In the TGO, room temperature XRD measurements indicated samples of both deposition methods showed similar in-plane compressive stresses after 300 and 600 thermal cycles. In-situ XRD measurements indicated similar high-temperature in-plane and out-of-plane stress in the TGO and no spallation after 600 thermal cycles for both coatings. Tensile in-plane residual stresses were found in the YSZ uncycled PS-PVD samples, similar to APS coatings. PS-PVD samples showed in most cases, higher compressive residual in-plane stress at the YSZ/TGO interface. These results provide valuable insight for optimizing the PS-PVD processing parameters to obtain strain compliance similar to that of EB-PVD. Additionally, external cooling methods used for thermal management in jet engine turbines were investigated. In this work, an additively manufactured lattice structure providing transpiration cooling holes is designed and residual strains are measured within an AM transpiration cooling sample using XRD. Strains within the lattice structure were found to have greater variation than that of the AM solid wall. These results provide valuable insight into the viability of implementing an AM lattice structure in turbine blades for the use of transpiration cooling.
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Date Issued: 2019
Identifier: CFE0007844, ucf:52830
Format: Document (PDF)
PURL: http://purl.flvc.org/ucf/fd/CFE0007844

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