Current Search: injection (x)
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Title
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AN ANALOGY BASED COSTING SYSTEM FOR INJECTION MOLDS BASED UPON GEOMETRY SIMILARITY WITH WAVELETS.
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Creator
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Hillsman, Cyrus, Wang, Yan, University of Central Florida
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Abstract / Description
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The injection molding industry is large and diversified. However there is no universally accepted way to bid molds, despite the fact that the mold and related design comprise 50% of the total cost of an injection-molded part over its lifetime. This is due to both the structure of the industry and technical difficulties in developing an automated and practical cost estimation system. The technical challenges include lack of a common data format for both parts and molds; the comprehensive...
Show moreThe injection molding industry is large and diversified. However there is no universally accepted way to bid molds, despite the fact that the mold and related design comprise 50% of the total cost of an injection-molded part over its lifetime. This is due to both the structure of the industry and technical difficulties in developing an automated and practical cost estimation system. The technical challenges include lack of a common data format for both parts and molds; the comprehensive consideration of the data about a wide variety of mold types, designs, complexities, number of cavities and other factors that directly affect cost; and the robustness of estimation due to variations of build time and cost. In this research, we propose a new mold cost estimation approach based upon clustered features of parts. Geometry similarity is used to estimate the complexity of a mold from a 2D image with one orthographic view of the injection-molded part. Wavelet descriptors of boundaries as well as other inherent shape properties such as size, number of boundaries, etc. are used to describe the complexity of the part. Regression models are then built to predict costs. In addition to mean estimates, prediction intervals are calculated to support risk management.
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Date Issued
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2009
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Identifier
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CFE0002866, ucf:48041
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Format
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Document (PDF)
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PURL
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http://purl.flvc.org/ucf/fd/CFE0002866
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Title
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Injection-locked semiconductor lasers for realization of novel RF photonics components.
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Creator
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Hoghooghi, Nazanin, Delfyett, Peter, Likamwa, Patrick, Li, Guifang, Malocha, Donald, University of Central Florida
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Abstract / Description
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This dissertation details the work has been done on a novel resonant cavity linear interferometric modulator and a direct phase detector with channel filtering capability using injection-locked semiconductor lasers for applications in RF photonics. First, examples of optical systems whose performance can be greatly enhanced by using a linear intensity modulator are presented and existing linearized modulator designs are reviewed. The novel linear interferometric optical intensity modulator...
Show moreThis dissertation details the work has been done on a novel resonant cavity linear interferometric modulator and a direct phase detector with channel filtering capability using injection-locked semiconductor lasers for applications in RF photonics. First, examples of optical systems whose performance can be greatly enhanced by using a linear intensity modulator are presented and existing linearized modulator designs are reviewed. The novel linear interferometric optical intensity modulator based on an injection-locked laser as an arcsine phase modulator is introduced and followed by numerical simulations of the phase and amplitude response of an injection-locked semiconductor laser. The numerical model is then extended to study the effects of the injection ratio, nonlinear cavity response, depth of phase and amplitude modulation on the spur-free dynamic range of a semiconductor resonant cavity linear modulator. Experimental results of the performance of the linear modulator implemented with a multi-mode Fabry-Perot semiconductor laser as the resonant cavity are shown and compared with the theoretical model. The modulator performance using a vertical cavity surface emitting laser as the resonant cavity is investigated as well. Very low V? in the order of 1 mV, multi-gigahertz bandwidth (-10 dB bandwidth of 5 GHz) and a spur-free dynamic range of 120 dB.Hz2/3 were measured directly after the modulator. The performance of the modulator in an analog link is experimentally investigated and the results show no degradation of the modulator linearity after a 1 km of SMF.The focus of the work then shifts to applications of an injection-locked semiconductor laser as a direct phase detector and channel filter. This phase detection technique does not require a local oscillator. Experimental results showing the detection and channel filtering capability of an injection-locked semiconductor diode laser in a three channel system are shown. The detected electrical signal has a signal-to-noise ratio better than 60 dB/Hz. In chapter 4, the phase noise added by an injection-locked vertical cavity surface emitting laser is studied using a self-heterodyne technique. The results show the dependency of the added phase noise on the injection ratio and detuning frequency. The final chapter outlines the future works on the linear interferometric intensity modulator including integration of the modulator on a semiconductor chip and the design of the modulator for input pulsed light.
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Date Issued
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2012
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Identifier
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CFE0004385, ucf:49368
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Format
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Document (PDF)
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PURL
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http://purl.flvc.org/ucf/fd/CFE0004385
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Title
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QUANTUM DOT BASED MODE-LOCKED SEMICONDUCTOR LASERS AND APPLICATIONS.
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Creator
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Kim, Jimyung, Delfyett, Peter, University of Central Florida
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Abstract / Description
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In this dissertation, self-assembled InAs/InGaAs quantum dot Fabry-PÃÂÃÂÃÂérot lasers and mode-locked lasers are investigated. The mode-locked lasers investigated include monolithic and curved two-section devices, and colliding pulse mode-locked diode lasers. Ridge waveguide semiconductor lasers have been designed and fabricated by wet etching processes. Electroluminescence of the quantum dot...
Show moreIn this dissertation, self-assembled InAs/InGaAs quantum dot Fabry-PÃÂÃÂÃÂérot lasers and mode-locked lasers are investigated. The mode-locked lasers investigated include monolithic and curved two-section devices, and colliding pulse mode-locked diode lasers. Ridge waveguide semiconductor lasers have been designed and fabricated by wet etching processes. Electroluminescence of the quantum dot lasers is studied. Cavity length dependent lasing via ground state and/or excited state transitions is observed from quantum dot lasers and the optical gain from both transitions is measured. Stable optical pulse trains via ground and excited state transitions are generated using a grating coupled external cavity with a curved two-section device. Large differences in the applied reverse bias voltage on the saturable absorber are observed for stable mode-locking from the excited and ground state mode-locking regimes. The optical pulses from quantum dot mode-locked lasers are investigated in terms of chirp sign and linear chirp magnitude. Upchirped pulses with large linear chirp magnitude are observed from both ground and excited states. Externally compressed pulse widths from the ground and excited states are 1.2 ps and 970 fs, respectively. Ground state optical pulses from monolithic mode-locked lasers e.g., two-section devices and colliding pulse mode-locked lasers, are also studied. Transformed limited optical pulses (~4.5 ps) are generated from a colliding pulse mode-locked semiconductor laser. The above threshold linewidth enhancement factor of quantum dot Fabry-PÃÂÃÂÃÂérot lasers is measured using the continuous wave injection locking method. A strong spectral dependence of the linewidth enhancement factor is observed around the gain peak. The measured linewidth enhancement factor is highest at the gain peak, but becomes lower 10 nm away from the gain peak. The lowest linewidth enhancement factor is observed on the anti-Stokes side. The spectral dependence of the pulse duration from quantum dot based mode-locked lasers is also observed. Shorter pulses and reduced linear chirp are observed on the anti-Stokes side and externally compressed 660 fs pulses are achieved in this spectral regime. A novel clock recovery technique using passively mode-locked quantum dot lasers is investigated. The clock signal (~4 GHz) is recovered by injecting an interband optical pulse train to the saturable absorber section. The excited state clock signal is recovered through the ground state transition and vice-versa. Asymmetry in the locking bandwidth is observed. The measured locking bandwidth is 10 times wider when the excited state clock signal is recovered from the ground state injection, as compared to recovering a ground state clock signal from excited state injection.
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Date Issued
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2010
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Identifier
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CFE0003295, ucf:48493
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Format
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Document (PDF)
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PURL
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http://purl.flvc.org/ucf/fd/CFE0003295
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Title
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FABRICATION AND TRANSPORT STUDIES OF N-TYPE ORGANIC FIELD EFFECT TRANSISTORS USING ALIGNED ARRAY CARBON NANOTUBES ELECTRODES.
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Creator
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Jimenez, Edwards, Khondaker, Saiful, University of Central Florida
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Abstract / Description
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We present fabrication of n-type organic field effect transistors (OFETs) using densely aligned array carbon nanotube (CNT) electrodes. The CNTs were aligned with a high linear density via dielectrophoresis (DEP) from an aqueous solution. In order to fabricate the CNT electrodes, aligned CNTs were cut by using electron beam lithography (EBL) and precise oxygen plasma etching. The n-type OFETs were fabricated in a bottom-contact configuration by depositing a thin film of C60 molecules between...
Show moreWe present fabrication of n-type organic field effect transistors (OFETs) using densely aligned array carbon nanotube (CNT) electrodes. The CNTs were aligned with a high linear density via dielectrophoresis (DEP) from an aqueous solution. In order to fabricate the CNT electrodes, aligned CNTs were cut by using electron beam lithography (EBL) and precise oxygen plasma etching. The n-type OFETs were fabricated in a bottom-contact configuration by depositing a thin film of C60 molecules between the CNT source and drain electrodes, and compared against a controlled C60 OFET with gold electrodes. The electron transport measurements of the OFETs using CNT electrodes show better transistor characteristics compared to OFETs using gold electrodes due to improved charge injection from densely aligned and open-ended nanotube tips.
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Date Issued
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2012
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Identifier
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CFH0004217, ucf:44941
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Format
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Document (PDF)
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PURL
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http://purl.flvc.org/ucf/fd/CFH0004217
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Title
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Trust-Based Rating Prediction and Malicious Profile Detection in Online Social Recommender Systems.
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Creator
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Davoudi, Anahita, Chatterjee, Mainak, Hu, Haiyan, Zou, Changchun, Rahnavard, Nazanin, University of Central Florida
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Abstract / Description
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Online social networks and recommender systems have become an effective channel for influencing millions of users by facilitating exchange and spread of information. This dissertation addresses multiple challenges that are faced by online social recommender systems such as: i) finding the extent of information spread; ii) predicting the rating of a product; and iii) detecting malicious profiles. Most of the research in this area do not capture the social interactions and rely on empirical or...
Show moreOnline social networks and recommender systems have become an effective channel for influencing millions of users by facilitating exchange and spread of information. This dissertation addresses multiple challenges that are faced by online social recommender systems such as: i) finding the extent of information spread; ii) predicting the rating of a product; and iii) detecting malicious profiles. Most of the research in this area do not capture the social interactions and rely on empirical or statistical approaches without considering the temporal aspects. We capture the temporal spread of information using a probabilistic model and use non-linear differential equations to model the diffusion process. To predict the rating of a product, we propose a social trust model and use the matrix factorization method to estimate user's taste by incorporating user-item rating matrix. The effect of tastes of friends of a user is captured using a trust model which is based on similarities between users and their centralities. Similarity is modeled using Vector Space Similarity and Pearson Correlation Coefficient algorithms, whereas degree, eigen-vector, Katz, and PageRank are used to model centrality. As rating of a product has tremendous influence on its saleability, social recommender systems are vulnerable to profile injection attacks that affect user's opinion towards favorable or unfavorable recommendations for a product. We propose a classification approach for detecting attackers based on attributes that provide the likelihood of a user profile of that of an attacker. To evaluate the performance, we inject push and nuke attacks, and use precision and recall to identify the attackers. All proposed models have been validated using datasets from Facebook, Epinions, and Digg. Results exhibit that the proposed models are able to better predict the information spread, rating of a product, and identify malicious user profiles with high accuracy and low false positives.
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Date Issued
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2018
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Identifier
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CFE0007168, ucf:52245
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Format
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Document (PDF)
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PURL
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http://purl.flvc.org/ucf/fd/CFE0007168
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Title
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Electronic and Optoelectronic Transport Properties of Carbon Nanotube/Organic Semiconductor Devices.
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Creator
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Sarker, Biddut, Khondaker, Saiful, Schulte, Alfons, Stolbov, Sergey, Gesquiere, Andre, University of Central Florida
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Abstract / Description
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Organic field effect transistors (OFETs) are of significant research interest due to their promising applications in large area, low-cost electronic devices such as flexible displays, sensor arrays, and radio-frequency identification tags. A major bottleneck in fabricating high-performance OFET is the large interfacial barrier between the metal electrodes and organic semiconductors (OSC) which results in an inefficient charge injection. Carbon nanotubes (CNTs) are considered to be a promising...
Show moreOrganic field effect transistors (OFETs) are of significant research interest due to their promising applications in large area, low-cost electronic devices such as flexible displays, sensor arrays, and radio-frequency identification tags. A major bottleneck in fabricating high-performance OFET is the large interfacial barrier between the metal electrodes and organic semiconductors (OSC) which results in an inefficient charge injection. Carbon nanotubes (CNTs) are considered to be a promising electrode material which can address this challenge.In this dissertation, we demonstrate fabrication of high-performance OFETs using aligned array CNT electrodes and investigate the detailed electronic transport properties of the fabricated devices. The OFETs with CNT electrodes show a remarkable enhancement in the device performance such as high mobility, high current on-off ratio, higher cutoff frequency, absence of short channel effect and better charge carrier injection than those OFETs with metal electrodes. From the low temperature transport measurements, we show that the charge injection barrier at CNT/OSC interface is smaller than that of the metal/OSC interface. A transition from direct tunneling to Fowler-Nordheim tunneling observed in CNT/OSC system shows further evidence of low injection barrier. A lower activation energy measured for the OFETs with CNT electrodes gives evidence of lower interfacial trap states. Finally, OFETs are demonstrated by directly growing crystalline organic nanowires on aligned array CNT electrodes.In addition to investigating the interfacial barrier at CNT/OSC interface, we also studied photoconduction mechanism of the CNT and CNT/OSC nanocomposite thin film devices. We found that the photoconduction is due to the exciton dissociations and charge carrier separation caused by a Schottky barrier at the metallic electrode/CNT interface and diffusion of the charge carrier through percolating CNT networks. In addition, it is found that photoresponse of the CNT/organic semiconductor can be tuned by changing the weight percentage of CNT into the organic semiconductors.
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Date Issued
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2012
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Identifier
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CFE0004596, ucf:49217
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Format
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Document (PDF)
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PURL
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http://purl.flvc.org/ucf/fd/CFE0004596
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Title
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"Design and Simulation of CMOS RF Active Mixers".
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Creator
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Gibson, Allen, Yuan, Jiann-Shiun, Wei, Lei, Sundaram, Kalpathy, University of Central Florida
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Abstract / Description
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This paper introduces a component of the Radio Frequency transceiver called the mixer. The mixer is a critical component in the RF systems, because of its ability for frequency conversion. This passage focuses on the design analysis and simulation of multiple topologies for the active down-conversion mixer. This mixer is characterized by its important design properties which consist of conversion gain, linearity, noise figure, and port isolation. The topologies that are given in this passage...
Show moreThis paper introduces a component of the Radio Frequency transceiver called the mixer. The mixer is a critical component in the RF systems, because of its ability for frequency conversion. This passage focuses on the design analysis and simulation of multiple topologies for the active down-conversion mixer. This mixer is characterized by its important design properties which consist of conversion gain, linearity, noise figure, and port isolation. The topologies that are given in this passage range from the most commonly known mixer design, to implemented design techniques that are used to increase the mixers important design properties as the demand of CMOS technology and the overall RF system rises. All mixer topologies were designed and simulated using TSMC 0.18 (&)#181;m CMOS technology in Advanced Design Systems, a simulator used specifically for RF designs.
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Date Issued
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2011
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Identifier
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CFE0004112, ucf:49086
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Format
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Document (PDF)
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PURL
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http://purl.flvc.org/ucf/fd/CFE0004112
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Title
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STUDY OF DESIGN FOR RELIABILITY OF RF AND ANALOG CIRCUITS.
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Creator
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Tang, Hongxia, Yuan, Jiann-Shiun, Wu, Xinzhang, Sundaram, Kalpathy, Chow, Lee, University of Central Florida
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Abstract / Description
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Due to continued device dimensions scaling, CMOS transistors in the nanometer regime have resulted in major reliability and variability challenges. Reliability issues such as channel hot electron injection, gate dielectric breakdown, and negative bias temperature instability (NBTI) need to be accounted for in the design of robust RF circuits. In addition, process variations in the nanoscale CMOS transistors are another major concern in today's circuits design.An adaptive gate-source biasing...
Show moreDue to continued device dimensions scaling, CMOS transistors in the nanometer regime have resulted in major reliability and variability challenges. Reliability issues such as channel hot electron injection, gate dielectric breakdown, and negative bias temperature instability (NBTI) need to be accounted for in the design of robust RF circuits. In addition, process variations in the nanoscale CMOS transistors are another major concern in today's circuits design.An adaptive gate-source biasing scheme to improve the RF circuit reliability is presented in this work. The adaptive method automatically adjusts the gate-source voltage to compensate the reduction in drain current subjected to various device reliability mechanisms. A class-AB RF power amplifier shows that the use of a source resistance makes the power-added efficiency robust against threshold voltage and mobility variations, while the use of a source inductance is more reliable for the input third-order intercept point.A RF power amplifier with adaptive gate biasing is proposed to improve the circuit device reliability degradation and process variation. The performances of the power amplifier with adaptive gate biasing are compared with those of the power amplifier without adaptive gate biasing technique. The adaptive gate biasing makes the power amplifier more resilient to process variations as well as the device aging such as mobility and threshold voltage degradation. Injection locked voltage-controlled oscillators (VCOs) have been examined. The VCOs are implemented using TSMC 0.18 (&)#181;m mixed-signal CMOS technology. The injection locked oscillators have improved phase noise performance than free running oscillators.A differential Clapp-VCO has been designed and fabricated for the evaluation of hot electron reliability. The differential Clapp-VCO is formed using cross-coupled nMOS transistors, on-chip transformers/inductors, and voltage-controlled capacitors. The experimental data demonstrate that the hot carrier damage increases the oscillation frequency and degrades the phase noise of Clapp-VCO.A p-channel transistor only VCO has been designed for low phase noise. The simulation results show that the phase noise degrades after NBTI stress at elevated temperature. This is due to increased interface states after NBTI stress. The process variability has also been evaluated.
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Date Issued
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2012
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Identifier
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CFE0004223, ucf:49000
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Format
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Document (PDF)
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PURL
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http://purl.flvc.org/ucf/fd/CFE0004223
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Title
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Nanoelectronic Devices using Carbon Nanotubes and Graphene Electrodes: Fabrication and Electronic Transport Investigations.
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Creator
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Kang, Narae, Khondaker, Saiful, Leuenberger, Michael, Zhai, Lei, University of Central Florida
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Abstract / Description
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Fabrication of high-performance electronic devices using the novel semiconductors is essential for developing future electronics which can be applicable in large-area, flexible and transparent displays, sensors and solar cells. One of the major bottlenecks in the fabrication of high-performance devices is a large interfacial barrier formation at metal/semiconductor interface originated from Schottky barrier and interfacial dipole barrier which causes inefficient charge injection at the...
Show moreFabrication of high-performance electronic devices using the novel semiconductors is essential for developing future electronics which can be applicable in large-area, flexible and transparent displays, sensors and solar cells. One of the major bottlenecks in the fabrication of high-performance devices is a large interfacial barrier formation at metal/semiconductor interface originated from Schottky barrier and interfacial dipole barrier which causes inefficient charge injection at the interface. Therefore, having a favorable contact at electrode/semiconductor is highly desirable for high-performance devices fabrication.In this dissertation, the fabrication of nanoelectronic devices and investigation of their transport properties using carbon nanotubes (CNTs) and graphene as electrode materials will be shown. I investigated two types of devices using (i) semiconducting CNTs, and (ii) organic semiconductors (OSC). In the first part of this thesis, I will demonstrate the fabrication of high-performance solution-processed highly enriched (99%) semiconducting CNT thin film transistors (s-CNT TFTs) using densely aligned arrays of metallic CNTs (m-CNTs) for source/drain electrodes. From the electronic transport measurements at room temperature, significant improvements of field-effect mobility, on-conductance, transconductance and current on/off ratio for m-CNT/s-CNT devices were found compared to control palladium (Pd contacted s-CNT devices. From the temperature dependent transport investigation, a lower Schottky barrier height for the m-CNT/s-CNT devices was found compared to the devices with control metal electrodes. The enhanced device performance can be attributed to the unique device geometry as well as strong ?- ? interaction at m-CNT/s-CNT interfaces. In addition, I also investigated s-CNT TFTs using reduced graphene oxide (RGO) electrodes.In the second part of my thesis, I will demonstrate high-performance organic field-effect transistors (OFETs) using different types of graphene electrodes. I show that the performance of OFETs with pentacene as OSC and RGO as electrode can be continuously improved by increasing the carbon sp2 fraction of RGO. The carbon sp2 fractions of RGO were varied by controlling the reduction time. When compared to control Pd electrodes, the mobility of the OFETs shows an improvement of ?200% for 61% sp2 fraction RGO, which further improves to ?500% for 80% RGO electrode. Similarly, I show that when the chemical vapor deposition (CVD) graphene film is used as electrodes in fabricating OFET, the better performance is observed in comparison to RGO electrodes. Our study suggests that, in addition to ?-? interaction at graphene/pentacene interface, the tunable electronic properties of graphene as electrode have a significant role in OFETs performance. For a fundamental understanding of the interface, we fabricated short-channel OFETs with sub-100nm channel length using graphene electrode. From the low temperature electronic transport measurements, a lower charge injection barrier was found compared to control metal electrode. The detailed investigations reported in this thesis clearly indicated that the use of CNT and graphene as electrodes can improve the performance of future nanoelectronic devices.
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Date Issued
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2015
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Identifier
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CFE0006039, ucf:50982
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Format
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Document (PDF)
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PURL
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http://purl.flvc.org/ucf/fd/CFE0006039
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Title
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Charge and Spin Transport in Low-Dimensional Materials.
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Creator
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Ahmadi, Amin, Mucciolo, Eduardo, Del Barco, Enrique, Ishigami, Masa, Guo, Jing, University of Central Florida
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Abstract / Description
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My research has been focused on two main areas. First, electronic transports in chiral carbonnanotubes in the presence of charged adatoms. To study such systems we employed recursiveGreens function technique to evaluate the conductance using the Landauer formula. Comparingwith the experimental data, we determined the effective amplitude and the range of scatteringpotentials. In addition, using a similar approach we explained qualitatively an unusual conductancefeature in a metallic carbon...
Show moreMy research has been focused on two main areas. First, electronic transports in chiral carbonnanotubes in the presence of charged adatoms. To study such systems we employed recursiveGreens function technique to evaluate the conductance using the Landauer formula. Comparingwith the experimental data, we determined the effective amplitude and the range of scatteringpotentials. In addition, using a similar approach we explained qualitatively an unusual conductancefeature in a metallic carbon nanotube. The second part of my study was concerned to the dynamicalspin injection and spin currents in low-dimensional materials. We have developed an atomisticmodel to express the injected spin current in terms of the systems Greens function. The newformulation provides a framework to study the spin injection and relaxation of a system with anarbitrary structure.
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Date Issued
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2017
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Identifier
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CFE0006550, ucf:51343
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Format
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Document (PDF)
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PURL
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http://purl.flvc.org/ucf/fd/CFE0006550
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Title
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True linearized intensity modulation for photonic analog to digital conversion using an injection-locked mode-locked laser.
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Creator
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Sarailou, Edris, Delfyett, Peter, Likamwa, Patrick, Fathpour, Sasan, Malocha, Donald, University of Central Florida
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Abstract / Description
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A true linearized interferometric intensity modulator for pulsed light has been proposed and experimentally presented in this thesis. This has been achieved by introducing a mode-locked laser into one of the arms of a Mach-Zehnder interferometer and injection-locking it to the input light (which is pulsed and periodic). By modulating the injection-locked laser, and combining its output light with the light from the other arm of interferometer in quadrature, one can achieve true linearized...
Show moreA true linearized interferometric intensity modulator for pulsed light has been proposed and experimentally presented in this thesis. This has been achieved by introducing a mode-locked laser into one of the arms of a Mach-Zehnder interferometer and injection-locking it to the input light (which is pulsed and periodic). By modulating the injection-locked laser, and combining its output light with the light from the other arm of interferometer in quadrature, one can achieve true linearized intensity modulator. This linearity comes from the arcsine phase response of the injection-locked mode-locked laser (as suggested by steady-state solution of Adler's equation) when it is being modulated. Mode-locked lasers are fabricated using a novel AlGaInAs-InP material system. By using the BCB for planarization and minimizing the metal pad size and directly modulating the laser, we have achieved very effective fundamental hybrid mode-locking at the repetition rate of ~ 23 GHz. This laser also provided the short pulses of 860 fs and 280 fs timing jitter integrated from 1 Hz- 100 MHz.The linearized intensity modulator has been built by using two identical two-section mode-locked lasers with the same length, one as the slave laser in one of the arms of the Mach-Zehnder interferometer injection-locked to the other one as the master which is the input light to the modulator. A low V? of 8.5 mV is achieved from this modulator. Also the current of the gain section or the voltage of the saturable absorber section of the slave laser has been used to apply the modulation signal. A spur free dynamic range of 70 dB.Hz2/3 is achieved when modulating the modulator through the saturable absorber. Modulating the saturable absorber provides a reduced third-order intermodulation tone with respect to modulating the gain. This is simply because of the unwanted amplitude modulation created when modulating the gain section current.Finally an improved design is proposed and demonstrated to improve the modulator performance. This is achieved by introducing a third section to the laser. Using the impurity free vacancy disordering technique the photoluminescence peak of this section is blue-shifted selectively and therefore there would not be any absorption in that passive section. By applying the modulation signal to this passive section rather than applying it to the gain section or saturable absorber section, the amplitude and phase modulation could be decoupled. The experimental results have presented here and an almost six-fold reduction in V? and 5 dB improvement in spur free dynamic range have been achieved. The proposed and demonstrated configuration as an analog optical link has the potential to increase the performance and resolution of photonic analog-to-digital converters.
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Date Issued
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2015
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Identifier
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CFE0005707, ucf:50118
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Format
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Document (PDF)
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PURL
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http://purl.flvc.org/ucf/fd/CFE0005707
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Title
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ELECTRON INJECTION-INDUCED EFFECTS IN III-NITRIDES: PHYSICS AND APPLICATIONS.
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Creator
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Burdett, William Charles, Chernyak, Leonid, University of Central Florida
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Abstract / Description
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This research investigated the effect of electron injection in III-Nitrides. The combination of electron beam induced current and cathodoluminescence measurements was used to understand the impact of electron injection on the minority carrier transport and optical properties. In addition, the application of the electron injection effect in optoelectronic devices was investigated.The impact of electron injection on the minority carrier diffusion length was studied at various temperatures in Mg...
Show moreThis research investigated the effect of electron injection in III-Nitrides. The combination of electron beam induced current and cathodoluminescence measurements was used to understand the impact of electron injection on the minority carrier transport and optical properties. In addition, the application of the electron injection effect in optoelectronic devices was investigated.The impact of electron injection on the minority carrier diffusion length was studied at various temperatures in Mg-doped p-GaN, p-AlxGa1-xN, and p-AlxGa1-x N/GaN superlattices. It was found that the minority carrier diffusion length experienced a multi-fold linear increase and that the rate of change of the diffusion length decreased exponentially with increasing temperature. The effect was attributed to a temperature-activated release of the electrons, which were trapped by the Mg levels.The activation energies for the electron injection effect in the Mg-doped (Al)GaN samples were found to range from 178 to 267 meV, which is close to the thermal ionization energy of the Mg acceptor. The activation energy observed for Al0.15Ga0.85N and Al0.2Ga0.8N was consistent with the deepening of the Mg acceptor level due to the incorporation of Al into the GaN lattice. The activation energy in the homogeneously doped Al0.2Ga0.8N/GaN superlattice indicates that the main contribution to the electron injection effect comes from the capture of injected electrons by the wells (GaN). The electron injection effect was successfully applied to GaN doped with an impurity (Mn) other than Mg. Electron injection into Mn-doped GaN resulted in a multi-fold increase of the minority carrier diffusion length and a pronounced decrease in the band-to-band cathodoluminescence intensity. The activation energy due to the electron injection effect was estimated from temperature-dependent cathodoluminescence measurements to be 360 meV. The decrease in the band-to-band cathodoluminescence is consistent with an increase in the diffusion length and these results are attributed to an increase in the minority carrier lifetime due to the trapping of injected electrons by the Mn levels.A forward bias was applied to inject electrons into commercially built p-i-n and Schottky barrier photodetectors. Up to an order of magnitude increase in the peak (360 nm) responsivity was observed. The enhanced photoresponse lasted for over four weeks and was attributed to an electron injection-induced increase of the minority carrier diffsuion length and the lifetime.
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Date Issued
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2004
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Identifier
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CFE0000080, ucf:46109
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Format
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Document (PDF)
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PURL
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http://purl.flvc.org/ucf/fd/CFE0000080
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Title
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INJECTION TECHNIQUES OF SUBCUTANEOUS ANTICOAGULANT THERAPIES.
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Creator
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Morissette, Leah, Desmarais, Paul, University of Central Florida
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Abstract / Description
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Subcutaneous anticoagulant medications like Heparin and Low-Molecular Weight Heparin are injections that readily cause bruising, pain, induration, and hematoma formation at the injection site. It is known that these adverse reactions can be correlated to the technique used to administer these medications; however, there is no established technique that reduces bruising, pain, induration, and hematoma formation at the site. Currently, the only protocol for subcutaneous Heparin and Low...
Show moreSubcutaneous anticoagulant medications like Heparin and Low-Molecular Weight Heparin are injections that readily cause bruising, pain, induration, and hematoma formation at the injection site. It is known that these adverse reactions can be correlated to the technique used to administer these medications; however, there is no established technique that reduces bruising, pain, induration, and hematoma formation at the site. Currently, the only protocol for subcutaneous Heparin and Low-Molecular Weight Heparin is that it is to be administered subcutaneously in the abdomen and when using a prefilled syringe, the air bubble should not be removed. The purpose of this study was to identify current nursing practice for the administration of these medications and to compare the results to researched techniques that resulted in less adverse site reactions. A total of 33 participants were recruited. The survey targeted six researched techniques found, after a comprehensive literature review, to have reduced site adverse effects associated with subcutaneous Heparin and Low-Molecular Weight Heparin. After completing the survey, it was found that current practice does not reflect techniques researched to reduce bruising, pain, induration, and hematoma formation at the site. In fact, very few completed one of the six research techniques that were questioned, which included: a two minute application of a cold compress/pack before and/or after the injection, an injection duration lasting 30 seconds, slow removal of the needle over five seconds, application of pressure after the injection for a minimum of 30 seconds, use of a hot pack/compress after the injection, and the use of a3 mL syringe. It was also found that there were inconsistencies in techniques that have been previously established as current protocol for these medications.
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Date Issued
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2015
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Identifier
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CFH0004733, ucf:45390
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Format
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Document (PDF)
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PURL
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http://purl.flvc.org/ucf/fd/CFH0004733
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Title
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Injection Locking of Semiconductor Mode-Locked Lasers for Long-Term Stability of Widely Tunable Frequency Combs.
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Creator
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Williams, Charles, Delfyett, Peter, Hagan, David, Likamwa, Patrick, Vanstryland, Eric, DeSalvo, Richard, University of Central Florida
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Abstract / Description
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Harmonically mode-locked semiconductor lasers with external ring cavities offer high repetition rate pulse trains while maintaining low optical linewidth via long cavity storage times. Single frequency injection locking generates widely-spaced and tunable frequency combs from these harmonically mode-locked lasers, while stabilizing the optical frequencies. The output is stabilized long-term with the help of a feedback loop utilizing either a novel technique based on Pound-Drever-Hall...
Show moreHarmonically mode-locked semiconductor lasers with external ring cavities offer high repetition rate pulse trains while maintaining low optical linewidth via long cavity storage times. Single frequency injection locking generates widely-spaced and tunable frequency combs from these harmonically mode-locked lasers, while stabilizing the optical frequencies. The output is stabilized long-term with the help of a feedback loop utilizing either a novel technique based on Pound-Drever-Hall stabilization or by polarization spectroscopy. Error signals of both techniques are simulated and compared to experimentally obtained signals. Frequency combs spaced by 2.5 GHz and ~10 GHz are generated, with demonstrated optical sidemode suppression of unwanted modes of 36 dB, as well as RF supermode noise suppression of 14 dB for longer than 1 hour. In addition to the injection locking of actively harmonically mode-locked lasers, the injection locking technique for regeneratively mode-locked lasers, or Coupled Opto-Electronic Oscillators (COEOs), is also demonstrated and characterized extensively.
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Date Issued
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2013
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Identifier
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CFE0004774, ucf:49805
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Format
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Document (PDF)
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PURL
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http://purl.flvc.org/ucf/fd/CFE0004774
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Title
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On-Chip Optical Stabilization of High-Speed Mode-locked Quantum Dot Lasers for Next Generation Optical Networks.
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Creator
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Ardey, Abhijeet, Delfyett, Peter, Chow, Lee, Peale, Robert, Likamwa, Patrick, University of Central Florida
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Abstract / Description
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Monolithic passively mode-locked colliding pulse semiconductor lasers generating pico- to sub-picosecond terahertz optical pulse trains are promising sources for future applications in ultra-high speed data transmission systems and optical measurements. However, in the absence of external synchronization, these passively mode-locked lasers suffer from large amplitude and timing jitter instabilities resulting in broad comb linewidths, which precludes many applications in the field of coherent...
Show moreMonolithic passively mode-locked colliding pulse semiconductor lasers generating pico- to sub-picosecond terahertz optical pulse trains are promising sources for future applications in ultra-high speed data transmission systems and optical measurements. However, in the absence of external synchronization, these passively mode-locked lasers suffer from large amplitude and timing jitter instabilities resulting in broad comb linewidths, which precludes many applications in the field of coherent communications and signal processing where a much narrower frequency line set is needed. In this dissertation, a novel quantum dot based coupled cavity laser is presented, where for the first time, four-wave mixing (FWM) in the monolithically integrated saturable absorber is used to injection lock a monolithic colliding pulse mode-locked (CPM) laser with a mode-locked high-Q ring laser. Starting with a passively mode-locked master ring laser, a stable 30 GHz optical pulse train is generated with more than 10 dB reduction in the RF noise level at 20 MHz offset and close to 3-times reduction in the average optical linewidth of the injection locked CPM slave laser. The FWM process is subsequently verified experimentally and conclusively shown to be the primary mechanism responsible for the observed injection locking. Other linear scattering effects are found to be negligible, as predicted in the orthogonal waveguide configuration. The novel injection locking technique is further exploited by employing optical hybrid mode-locking and increasing the Q of the master ring cavity, to realize an improved stabilization architecture. Dramatic reduction is shown with more than 14-times reduction in the photodetected beat linewidth and almost 5-times reduction in the optical linewidth of the injection locked slave laser with generation of close to transform limited pulses at ~ 30 GHz. These results demonstrate the effectiveness of the novel injection locking technique for an all-on-chip stability transfer and provides a new way of stabilizing monolithic optical pulse sources for applications in future high speed optical networks.
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Date Issued
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2014
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Identifier
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CFE0005299, ucf:50518
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Format
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Document (PDF)
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PURL
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http://purl.flvc.org/ucf/fd/CFE0005299
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Title
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Adaptive Architectural Strategies for Resilient Energy-Aware Computing.
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Creator
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Ashraf, Rizwan, DeMara, Ronald, Lin, Mingjie, Wang, Jun, Jha, Sumit, Johnson, Mark, University of Central Florida
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Abstract / Description
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Reconfigurable logic or Field-Programmable Gate Array (FPGA) devices have the ability to dynamically adapt the computational circuit based on user-specified or operating-condition requirements. Such hardware platforms are utilized in this dissertation to develop adaptive techniques for achieving reliable and sustainable operation while autonomously meeting these requirements. In particular, the properties of resource uniformity and in-field reconfiguration via on-chip processors are exploited...
Show moreReconfigurable logic or Field-Programmable Gate Array (FPGA) devices have the ability to dynamically adapt the computational circuit based on user-specified or operating-condition requirements. Such hardware platforms are utilized in this dissertation to develop adaptive techniques for achieving reliable and sustainable operation while autonomously meeting these requirements. In particular, the properties of resource uniformity and in-field reconfiguration via on-chip processors are exploited to implement Evolvable Hardware (EHW). EHW utilize genetic algorithms to realize logic circuits at runtime, as directed by the objective function. However, the size of problems solved using EHW as compared with traditional approaches has been limited to relatively compact circuits. This is due to the increase in complexity of the genetic algorithm with increase in circuit size. To address this research challenge of scalability, the Netlist-Driven Evolutionary Refurbishment (NDER) technique was designed and implemented herein to enable on-the-fly permanent fault mitigation in FPGA circuits. NDER has been shown to achieve refurbishment of relatively large sized benchmark circuits as compared to related works. Additionally, Design Diversity (DD) techniques which are used to aid such evolutionary refurbishment techniques are also proposed and the efficacy of various DD techniques is quantified and evaluated.Similarly, there exists a growing need for adaptable logic datapaths in custom-designed nanometer-scale ICs, for ensuring operational reliability in the presence of Process, Voltage, and Temperature (PVT) and, transistor-aging variations owing to decreased feature sizes for electronic devices. Without such adaptability, excessive design guardbands are required to maintain the desired integration and performance levels. To address these challenges, the circuit-level technique of Self-Recovery Enabled Logic (SREL) was designed herein. At design-time, vulnerable portions of the circuit identified using conventional Electronic Design Automation tools are replicated to provide post-fabrication adaptability via intelligent techniques. In-situ timing sensors are utilized in a feedback loop to activate suitable datapaths based on current conditions that optimize performance and energy consumption. Primarily, SREL is able to mitigate the timing degradations caused due to transistor aging effects in sub-micron devices by reducing the stress induced on active elements by utilizing power-gating. As a result, fewer guardbands need to be included to achieve comparable performance levels which leads to considerable energy savings over the operational lifetime.The need for energy-efficient operation in current computing systems has given rise to Near-Threshold Computing as opposed to the conventional approach of operating devices at nominal voltage. In particular, the goal of exascale computing initiative in High Performance Computing (HPC) is to achieve 1 EFLOPS under the power budget of 20MW. However, it comes at the cost of increased reliability concerns, such as the increase in performance variations and soft errors. This has given rise to increased resiliency requirements for HPC applications in terms of ensuring functionality within given error thresholds while operating at lower voltages. My dissertation research devised techniques and tools to quantify the effects of radiation-induced transient faults in distributed applications on large-scale systems. A combination of compiler-level code transformation and instrumentation are employed for runtime monitoring to assess the speed and depth of application state corruption as a result of fault injection. Finally, fault propagation models are derived for each HPC application that can be used to estimate the number of corrupted memory locations at runtime. Additionally, the tradeoffs between performance and vulnerability and the causal relations between compiler optimization and application vulnerability are investigated.
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Date Issued
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2015
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Identifier
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CFE0006206, ucf:52889
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Format
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Document (PDF)
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PURL
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http://purl.flvc.org/ucf/fd/CFE0006206
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Title
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DESIGN AND CHARACTERIZATION OF NOVELDEVICES FOR NEW GENERATION OF ELECTROSTATICDISCHARGE (ESD) PROTECTION STRUCTURES.
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Creator
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SALCEDO, Javier, Liou, Juin, University of Central Florida
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Abstract / Description
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The technology evolution and complexity of new circuit applications involve emerging reliability problems and even more sensitivity of integrated circuits (ICs) to electrostatic discharge (ESD)-induced damage. Regardless of the aggressive evolution in downscaling and subsequent improvement in applications' performance, ICs still should comply with minimum standards of ESD robustness in order to be commercially viable. Although the topic of ESD has received attention industry-wide, the...
Show moreThe technology evolution and complexity of new circuit applications involve emerging reliability problems and even more sensitivity of integrated circuits (ICs) to electrostatic discharge (ESD)-induced damage. Regardless of the aggressive evolution in downscaling and subsequent improvement in applications' performance, ICs still should comply with minimum standards of ESD robustness in order to be commercially viable. Although the topic of ESD has received attention industry-wide, the design of robust protection structures and circuits remains challenging because ESD failure mechanisms continue to become more acute and design windows less flexible. The sensitivity of smaller devices, along with a limited understanding of the ESD phenomena and the resulting empirical approach to solving the problem have yielded time consuming, costly and unpredictable design procedures. As turnaround design cycles in new technologies continue to decrease, the traditional trial-and-error design strategy is no longer acceptable, and better analysis capabilities and a systematic design approach are essential to accomplish the increasingly difficult task of adequate ESD protection-circuit design. This dissertation presents a comprehensive design methodology for implementing custom on-chip ESD protection structures in different commercial technologies. First, the ESD topic in the semiconductor industry is revised, as well as ESD standards and commonly used schemes to provide ESD protection in ICs. The general ESD protection approaches are illustrated and discussed using different types of protection components and the concept of the ESD design window. The problem of implementing and assessing ESD protection structures is addressed next, starting from the general discussion of two design methods. The first ESD design method follows an experimental approach, in which design requirements are obtained via fabrication, testing and failure analysis. The second method consists of the technology computer aided design (TCAD)-assisted ESD protection design. This method incorporates numerical simulations in different stages of the ESD design process, and thus results in a more predictable and systematic ESD development strategy. Physical models considered in the device simulation are discussed and subsequently utilized in different ESD designs along this study. The implementation of new custom ESD protection devices and a further integration strategy based on the concept of the high-holding, low-voltage-trigger, silicon controlled rectifier (SCR) (HH-LVTSCR) is demonstrated for implementing ESD solutions in commercial low-voltage digital and mixed-signal applications developed using complementary metal oxide semiconductor (CMOS) and bipolar CMOS (BiCMOS) technologies. This ESD protection concept proposed in this study is also successfully incorporated for implementing a tailored ESD protection solution for an emerging CMOS-based embedded MicroElectroMechanical (MEMS) sensor system-on-a-chip (SoC) technology. Circuit applications that are required to operate at relatively large input/output (I/O) voltage, above/below the VDD/VSS core circuit power supply, introduce further complications in the development and integration of ESD protection solutions. In these applications, the I/O operating voltage can extend over one order of magnitude larger than the safe operating voltage established in advanced technologies, while the IC is also required to comply with stringent ESD robustness requirements. A practical TCAD methodology based on a process- and device- simulation is demonstrated for assessment of the device physics, and subsequent design and implementation of custom P1N1-P2N2 and coupled P1N1-P2N2//N2P3-N3P1 silicon controlled rectifier (SCR)-type devices for ESD protection in different circuit applications, including those applications operating at I/O voltage considerably above/below the VDD/VSS. Results from the TCAD simulations are compared with measurements and used for developing technology- and circuit-adapted protection structures, capable of blocking large voltages and providing versatile dual-polarity symmetric/asymmetric S-type current-voltage characteristics for high ESD protection. The design guidelines introduced in this dissertation are used to optimize and extend the ESD protection capability in existing CMOS/BiCMOS technologies, by implementing smaller and more robust single- or dual-polarity ESD protection structures within the flexibility provided in the specific fabrication process. The ESD design methodologies and characteristics of the developed protection devices are demonstrated via ESD measurements obtained from fabricated stand-alone devices and on-chip ESD protections. The superior ESD protection performance of the devices developed in this study is also successfully verified in IC applications where the standard ESD protection approaches are not suitable to meet the stringent area constraint and performance requirement.
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Date Issued
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2006
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Identifier
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CFE0001213, ucf:46942
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Format
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Document (PDF)
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PURL
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http://purl.flvc.org/ucf/fd/CFE0001213