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Three-Dimensional Simulation Study of Low Voltage ((<)100V) Superjunction Lateral DMOS power transistors

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Date Issued:
2016
Abstract/Description:
A new revolutionary concept was presented two decades ago, known as (")semiconductor Superjunction (SJ) theory(") to enhance the trade-off relationship between speci?c on resistance, Rsp, and off-state breakdown voltage, BV, in medium to high voltages (more than 100 V) power MOSFETs. The SJ concept was ?rst applied and commercialized to vertical structures, but it hasn't been used yet in low voltage MOSFETs with lateral structures. This thesis provides a review of the most common structures, principles and design techniques for discrete power MOSFETs. It also presents a simulation study of the application of these SJ concepts in the design of a Low Voltage SJ LDMOS transistor, using TCAD software. To make the device commercially feasible, this device design targets aggressive goals such as an off-state Breakdown Voltage of 60V with Rspof 20 miliohms per milimiter square. This study includes the analysis of the ?ow process for the fabrication of this transistor, using semiconductor technologies, and the simulation results, including Breakdown Voltage, on-state resistance, electric ?eld distribution among others simulation analysis.
Title: Three-Dimensional Simulation Study of Low Voltage ((<)100V) Superjunction Lateral DMOS power transistors.
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Name(s): Garcia, Jhonatan, Author
Yuan, Jiann-Shiun, Committee Chair
Sundaram, Kalpathy, Committee Member
Fan, Deliang, Committee Member
University of Central Florida, Degree Grantor
Type of Resource: text
Date Issued: 2016
Publisher: University of Central Florida
Language(s): English
Abstract/Description: A new revolutionary concept was presented two decades ago, known as (")semiconductor Superjunction (SJ) theory(") to enhance the trade-off relationship between speci?c on resistance, Rsp, and off-state breakdown voltage, BV, in medium to high voltages (more than 100 V) power MOSFETs. The SJ concept was ?rst applied and commercialized to vertical structures, but it hasn't been used yet in low voltage MOSFETs with lateral structures. This thesis provides a review of the most common structures, principles and design techniques for discrete power MOSFETs. It also presents a simulation study of the application of these SJ concepts in the design of a Low Voltage SJ LDMOS transistor, using TCAD software. To make the device commercially feasible, this device design targets aggressive goals such as an off-state Breakdown Voltage of 60V with Rspof 20 miliohms per milimiter square. This study includes the analysis of the ?ow process for the fabrication of this transistor, using semiconductor technologies, and the simulation results, including Breakdown Voltage, on-state resistance, electric ?eld distribution among others simulation analysis.
Identifier: CFE0006306 (IID), ucf:51600 (fedora)
Note(s): 2016-08-01
M.S.E.E.
Engineering and Computer Science, Electrical Engineering and Computer Engineering
Masters
This record was generated from author submitted information.
Subject(s): Superjunction -- TCAD -- Power MOSFET
Persistent Link to This Record: http://purl.flvc.org/ucf/fd/CFE0006306
Restrictions on Access: campus 2017-08-15
Host Institution: UCF

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