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Title: MODELING AND OPTIMIZATION OF BODY DIODE REVERSE RECOVERY CHARACTERISTICS OF LDMOS TRANSISTORS.
Creator: Deschaine, Wesley, Shen, John, University of Central Florida
Abstract / Description: As switching speeds for DC-DC converter applications keep becoming faster and faster and voltage requirements become smaller and smaller, the need for new device structures becomes more prevalent. Designers of these new structures will need to make sure they take into consideration the different power losses associated with the different structures and make modifications to reduce or if possible eliminate them. A new 30V LDMOS device has been created and is being implemented into a...
Show moreAs switching speeds for DC-DC converter applications keep becoming faster and faster and voltage requirements become smaller and smaller, the need for new device structures becomes more prevalent. Designers of these new structures will need to make sure they take into consideration the different power losses associated with the different structures and make modifications to reduce or if possible eliminate them. A new 30V LDMOS device has been created and is being implemented into a synchronous buck converter for future DC-DC conversions. This new lateral device has a Figure of Merit of 80mÙ*nC, representing a 50% reduction from the conventional trench MOSFET. The only draw back with this new device is that the body diode power loss has increased significantly. There are two principal goals of this research. The first is to reduce the body diode reverse recovery characteristics of a 30V LDMOS transistor without employing an additional Schottky diode, increasing the Figure of Merit, or decreasing the breakdown voltage past 30 volts. The second is to achieve 75% reduction in reverse recovery charge (Qrr) through each solution. Four solutions will be presented in this study and have been verified through extensive ISE-TCAD device and circuit simulation.
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Date Issued: 2006
Identifier: CFE0001081, ucf:46778
Format: Document (PDF)
PURL: http://purl.flvc.org/ucf/fd/CFE0001081

Title: An approach to improve the failure rate model of a solid state laser by utilizing the Physics of Failure Methodology.
Creator: Thompson, Omar, Kincaid, John, Bass, Michael, Clarke, Thomas, Wiegand, Rudolf, Shumaker, Randall, Bass, Michael, University of Central Florida
Abstract / Description: The ability to predict the failure rate of any military laser is very critical. In-field laser usage does not support the troubleshooting and repairing of a complex electro optical system. The only published laser failure rate model was last updated by the Department of Defense in 1975. Consequently, the failure rate predicted is inaccurate due to model deficiencies. This dissertatiodatn has developed a laser failure rate model for diode pumped lasers with improved failure rate prediction...
Show moreThe ability to predict the failure rate of any military laser is very critical. In-field laser usage does not support the troubleshooting and repairing of a complex electro optical system. The only published laser failure rate model was last updated by the Department of Defense in 1975. Consequently, the failure rate predicted is inaccurate due to model deficiencies. This dissertatiodatn has developed a laser failure rate model for diode pumped lasers with improved failure rate prediction accuracy. The model has surpassed the capabilities of the Department of Defense model by the inclusion of key performance attributes that are currently not taken into account. The scope of work completed was based on a tailored Physics of Failure methodology. The research approach implemented was: 1. Integration of Failure Mode and Effects Analysis to evaluate deployed laser failure. 2. Beam simulation for alignment tolerance analysis. 3. Thermal and vibration effects analysis on laser performance. 4. Analysis and development of a methodology to represent a resonator failure rate model. A secondary contribution of this research effort is supporting the update of the current laser failure rate model. The success of revising the current model relies on leveraging the work of other organizations in the area of failure rate modeling and reliability predictions.
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Date Issued: 2011
Identifier: CFE0004587, ucf:49214
Format: Document (PDF)
PURL: http://purl.flvc.org/ucf/fd/CFE0004587

Title: LASER METALLIZATION AND DOPING FOR SILICON CARBIDE DIODE FABRICATION AND ENDOTAXY.
Creator: Tian, Zhaoxu, Kar, Aravinda, University of Central Florida
Abstract / Description: Silicon carbide is a promising semiconductor material for high voltage, high frequency and high temperature devices due to its wide bandgap, high breakdown electric field strength, highly saturated drift velocity of electrons and outstanding thermal conductivity. With the aim of overcoming some challenges in metallization and doping during the fabrication of silicon carbide devices, a novel laser-based process is provided to direct metallize the surface of silicon carbide without metal...
Show moreSilicon carbide is a promising semiconductor material for high voltage, high frequency and high temperature devices due to its wide bandgap, high breakdown electric field strength, highly saturated drift velocity of electrons and outstanding thermal conductivity. With the aim of overcoming some challenges in metallization and doping during the fabrication of silicon carbide devices, a novel laser-based process is provided to direct metallize the surface of silicon carbide without metal deposition and dope in silicon carbide without high temperature annealing, as an alternative to the conventional ion implantation, and find applications of this laser direct write metallization and doping technique on the fabrication of diodes, endotaxial layer and embedded optical structures on silicon carbide wafers. Mathematical models have been presented for the temperature distributions in the wafer during laser irradiation to optimize laser process parameters and understand the doping and metallization mechanisms in laser irradiation process. Laser irradiation of silicon carbide in a dopant-containing ambient allows to simultaneously heating the silicon carbide surface without melting and incorporating dopant atoms into the silicon carbide lattice. The process that dopant atoms diffuse into the bulk silicon carbide by laser-induced solid phase diffusion (LISPD) can be explained by considering the laser enhanced substitutional and interstitial diffusion mechanisms. Nitrogen and Trimethyaluminum (TMA) are used as dopants to produce n-type and p-type doped silicon carbide, respectively. Two laser doping methods, i.e., internal heating doping and surface heating doping are presented in this dissertation. Deep (800 nm doped junction for internal heating doping) and shallow (200 nm and 450 nm doped junction for surface heating doping) can be fabricated by different doping methods. Two distinct diffusion regions, near-surface and far-surface regions, were identified in the dopant concentration profiles, indicating different diffusion mechanisms in these two regions. The effective diffusion coefficients of nitrogen and aluminum were determined for both regions by fitting the diffusion equation to the measured concentration profiles. The calculated diffusivities are at least 6 orders of magnitude higher than the typical values for nitrogen and aluminum, which indicate that laser doping process enhances the diffusion of dopants in silicon carbide significantly. No amorphization was observed in laser-doped samples eliminating the need for high temperature annealing. Laser direct metallization can be realized on the surface of silicon carbide by generating metal-like conductive phases due to the decomposition of silicon carbide. The ohmic property of the laser direct metallized electrodes can be dramatically improved by fabricating such electrodes on laser heavily doped SiC substrate. This laser-induced solid phase diffusion technique has been utilized to fabricate endolayers in n-type 6H-SiC substrates by carbon incorporation. X-ray energy dispersive spectroscopic analysis shows that the thickness of endolayer is about 100 nm. High resolution transmission electron microscopic images indicate that the laser endotaxy process maintains the crystalline integrity of the substrate without any amorphization. Rutherford backscattering studies also show no amorphization and evident lattice disorder occur during this laser solid phase diffusion process. The resistivity of the endolayer formed in a 1.55 omega•cm silicon carbide wafer segment was found to be 1.1E5 omega•cm which is sufficient for device fabrication and isolation. Annealing at 1000 oC for 10 min to remove hydrogen resulted in a resistivity of 9.4E4 omega•cm. Prototype silicon carbide PIN diodes have been fabricated by doping the endolayer and parent silicon carbide epilayer with aluminum using this laser-induced solid phase diffusion technique to create p-regions on the top surfaces of the substrates. Laser direct metallized contacts were also fabricated on selected PIN diodes to show the effectiveness of these contacts. The results show that the PIN diode fabricated on a 30 nm thick endolayer can block 18 V, and the breakdown voltages and the forward voltages drop at 100 A/cm2 of the diodes fabricated on 4H-SiC with homoepilayer are 420 ~ 500 V and 12.5 ~ 20 V, respectively. The laser direct metallization and doping technique can also be used to synthesize embedded optical structures, which can increase 40% reflectivity compared to the parent wafer, showing potential for the creation of optical, electro-optical, opto-electrical, sensor devices and other integrated structures that are stable in high temperature, high-pressure, corrosive environments and deep space applications.
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Date Issued: 2006
Identifier: CFE0001061, ucf:46803
Format: Document (PDF)
PURL: http://purl.flvc.org/ucf/fd/CFE0001061

Title: Design, Simulation and Characterization of Novel Electrostatic Discharge Protection Devices and Circuits in Advanced Silicon Technologies.
Creator: Liang, Wei, Sundaram, Kalpathy, Fan, Deliang, Jin, Yier, Wei, Lei, Salcedo, Javier, University of Central Florida
Abstract / Description: Electrostatic Discharge (ESD) has been one of the major reliability concerns in the advanced silicon technologies and it becomes more important with technology scaling. It has been reported that more than 35% of the failures in integrated circuits (ICs) are ESD induced. ESD event is a phenomenon that a finite amount of charges transfer between two objects with different potential in a quite short time. Such event contains a large energy and the ICs without proper ESD protection could be...
Show moreElectrostatic Discharge (ESD) has been one of the major reliability concerns in the advanced silicon technologies and it becomes more important with technology scaling. It has been reported that more than 35% of the failures in integrated circuits (ICs) are ESD induced. ESD event is a phenomenon that a finite amount of charges transfer between two objects with different potential in a quite short time. Such event contains a large energy and the ICs without proper ESD protection could be destroyed easily, so ESD protection solutions are essential to semiconductor industry.ESD protection design consists of on-chip and off-chip ESD protection design, and the research works in this dissertation are all conducted in on-chip level, which incorporate the ESD protection devices and circuits into the microchip, to provide with basic ESD protection from manufacturing to customer use. The basic idea of ESD protection design is to provide a path with low impedance which directs most of the ESD current to flow through itself instead of the core circuit, and the ESD protection path must be robust enough to make sure that it does not fail before the core circuit. In this way, proper design on protection devices and circuits should be considered carefully. To assist the understanding and design of ESD protection, the ESD event in real world has been classified into a few ESD model including Human Body Model (HBM), Machine Model (MM), Charged Device Model (CDM), etc. Some mainstream testing method and industry standard are also introduced, including Transmission Line Pulse (TLP), and IEC 61000-4-2. ESD protection devices including diode, Gate-Grounded N-type MOSFET (GGNMOS), Silicon Controlled Rectifier (SCR) are basic elements for ESD protection design. In this dissertation, the device characteristics in ESD event and their applications are introduced. From the perspective of the whole chip ESD protection design, the concept of circuit level ESD protection and the ESD clamps are also briefly introduced. Technology Computer Aided Design (TCAD) and Simulation Program with Integrated Circuit Emphasis (SPICE) simulation is widely used in ESD protection design. In this dissertation, TCAD and SPICE simulation are carried out for a few times for both of pre-tapeout evaluation on characteristics of the proposed device and circuit and post-tapeout analysis on structure operating mechanism.Automotive electronics has been a popular subject in semiconductor industry, and due to the special requirement of the automotive applications like the capacitive pins, the ESD protection device used in such applications need to be specially designed. In this dissertation, a few SCRs without snapback are discussed in detail. To avoid core circuit damages caused the displacement current induced by the large snapback in conventional SCR, an eliminated/minimized snapback is preferred in a selection of the protection device. Two novel SCRs are proposed for High Voltage (HV), Medium Voltage (MV), and Low Voltage (LV) automotive ESD protection.The typical operating temperature for ICs is up to 125 (&)#186;C, however in automotive applications, the operating temperature may extend up to 850 (&)#186;C. In this way, the characteristics of the ESD protection device under the elevated temperatures will be an essential part to investigate for automotive ESD protection design. In this dissertation, the high temperature characteristics of ESD protection devices including diode and a few SCRs is measured and discussed in detail. TCAD simulation are also conducted to explain the underlying physical mechanism. This work provides with a useful insight and information to ESD protection design in high temperature applications.Besides the high temperature environment, ESD protection are also highly needed for electronics working in other extreme environment like the space. Space is an environment that contains kinds of radiation source and at the same time can generate abundant ESD. The ESD adhering to the space systems could be a potential threat to the space electronics. At the same time, the characteristics of the ESD protection part especially the basic protection device used in the space electronics could be influenced after the irradiation in the space. Therefore, the investigation of the radiation effects on ESD protection devices are necessary. In this dissertation, the total ionizing dose (TID) effects on ESD protection devices are investigated. The devices are irradiated with 1.5 MeV He+ and characterized with TLP tester. The pre- and post-irradiation characteristics are compared and the variation on key ESD parameters are analyzed and discussed. This work offers a useful insight on ESD devices' operation under TID and help with the device designing on ESD protection devices for space electronics.Single ESD protection devices are essential part constructing the ESD protection network, however the optimization on ESD clamp circuit design is also important on building an efficient whole chip ESD protection network. In this dissertation, the design and simulation of a novel voltage triggered ESD detection circuit are introduced. The voltage triggered ESD detection circuit is proposed in a 0.18 um CMOS technology. Comparing with the conventional RC based detection circuit, the proposed circuit realizes a higher triggering efficiency with a much smaller footprint, and is immune to false triggering under fast power-up events. The proposed circuit has a better sensitivity to ESD event and is more reliable in ESD protection applications.The leakage current has been a concern with the scaling down of the thickness of the gate oxide. Therefore, a proper design of the ESD clamp for power rail ESD protection need to be specially considered. In this dissertation, a design of a novel ESD clamp with low leakage current is analyzed. The proposed clamp realized a pretty low leakage current up to 12 nA, and has a smaller footprint than conventional design. It also has a long hold-on time under ESD event and a quick turn-off mechanism for false triggering. SPICE simulation is carried out to evaluate the operation of the proposed ESD clamp.
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Date Issued: 2017
Identifier: CFE0007126, ucf:52298
Format: Document (PDF)
PURL: http://purl.flvc.org/ucf/fd/CFE0007126

Title: Semiconductor Device Modeling, Simulation, and Failure Prediction for Electrostatic Discharge Conditions.
Creator: Li, Hang, Sundaram, Kalpathy, Batarseh, Issa, Fan, Deliang, Gong, Xun, Salcedo, Javier, University of Central Florida
Abstract / Description: Electrostatic Discharge (ESD) caused failures are major reliability issues in IC industry. Device modeling for ESD conditions is necessary to evaluate ESD robustness in simulation. Although SPICE model is accurate and efficient for circuit simulations in most cases, devices under ESD conditions operate in abnormal status. SPICE model cannot cover the device operating region beyond normal operation.Thermal failure is one of the main reasons to cause device failure under ESD conditions. A...
Show moreElectrostatic Discharge (ESD) caused failures are major reliability issues in IC industry. Device modeling for ESD conditions is necessary to evaluate ESD robustness in simulation. Although SPICE model is accurate and efficient for circuit simulations in most cases, devices under ESD conditions operate in abnormal status. SPICE model cannot cover the device operating region beyond normal operation.Thermal failure is one of the main reasons to cause device failure under ESD conditions. A compact model is developed to predict thermal failure with circuit simulators. Instead of considering the detailed failure mechanisms, a failure temperature is introduced to indicate device failure. The developed model is implemented by a multiple-stage thermal network.P-N junction is the fundamental structure for ESD protection devices. An enhanced diode model is proposed and is used to simulate the device behaviors for ESD events. The model includes all physical effects for ESD conditions, which are voltage overshoot, self-heating effect, velocity saturation and thermal failure. The proposed model not only can fit the I-V and transient characteristics, but also can predict failure for different pulses.Safe Operating Area (SOA) is an important factor to evaluate the LDMOS performance. The transient SOA boundary is considered as power-defined. By placing the failure monitor under certain conditions, the developed modeling methodology can predict the boundary of transient SOA for any short pulse stress conditions. No matter failure happens before or after snapback phenomenon.Weibull distribution is popular to evaluate the dielectric lifetime for CVS. By using the transformative version of power law, the pulsing stresses are converted into CVS, and TDDB under ESD conditions for SiN MIMCAPs is analyzed. The thickness dependency and area independency of capacitor breakdown voltage is observed, which can be explained by the constant ?E model instead of conventional percolation model.
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Date Issued: 2019
Identifier: CFE0007670, ucf:52512
Format: Document (PDF)
PURL: http://purl.flvc.org/ucf/fd/CFE0007670

Title: Predictive modeling for assessing the reliability of bypass diodes in Photovoltaic modules.
Creator: Shiradkar, Narendra, Sundaram, Kalpathy, Schoenfeld, Winston, Atia, George, Abdolvand, Reza, Xanthopoulos, Petros, University of Central Florida
Abstract / Description: Solar Photovoltaics (PV) is one of the most promising renewable energy technologies for mitigating the effect of climate change. Reliability of PV modules directly impacts the Levelized Cost of Energy (LCOE), which is a metric for cost competitiveness of any energy technology. Further reduction in LCOE of PV through assured long term reliability is necessary in order to facilitate widespread use of solar energy without the need for subsidies. This dissertation is focused on frameworks for...
Show moreSolar Photovoltaics (PV) is one of the most promising renewable energy technologies for mitigating the effect of climate change. Reliability of PV modules directly impacts the Levelized Cost of Energy (LCOE), which is a metric for cost competitiveness of any energy technology. Further reduction in LCOE of PV through assured long term reliability is necessary in order to facilitate widespread use of solar energy without the need for subsidies. This dissertation is focused on frameworks for assessing reliability of bypass diodes in PV modules. Bypass diodes are critical components in PV modules that provide protection against shading. Failure of bypass diode in short circuit results in reducing the PV module power by one third, while diode failure in open circuit leaves the module susceptible for extreme hotspot heating and potentially fire hazard. PV modules, along with the bypass diodes are expected to last at least 25 years in field. The various failure mechanisms in bypass diodes such as thermal runaway, high temperature forward bias operation and thermal cycling are discussed. Operation of bypass diode under shading is modeled and method for calculating the module I-V curve under any shading scenario is presented. Frameworks for estimating the diode temperature in field deployed modules based on Typical Meteorological Year (TMY) data are developed. Model for predicting the susceptibility of bypass diodes for thermal runaway is presented. Diode wear out due to High Temperature Forward Bias (HTFB) operation and Thermal Cycling (TC) is studied under custom designed accelerated tests. Overall, this dissertation is an effort towards estimating the lifetime of bypass diodes in field deployed modules, and therefore, reducing the uncertainty in long term reliability of PV modules.
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Date Issued: 2015
Identifier: CFE0006001, ucf:51023
Format: Document (PDF)
PURL: http://purl.flvc.org/ucf/fd/CFE0006001

Title: Customizable Antenna Array Using Reconfigurable Antenna Elements.
Creator: Shirazi, Mahmoud, Gong, Xun, Wahid, Parveen, Jones, W Linwood, Abdolvand, Reza, Kuebler, Stephen, University of Central Florida
Abstract / Description: A shared-aperture reconfigurable slot-ring antenna array switching between different frequency bands and polarizations is presented for phased array applications. PIN diode switches are incorporated into the slots of the antenna to change the state of the reconfigurable slot-ring antenna array. Each frequency band has its own feeding lines which allows for the use of high-performance narrow-band transmit/receive (T/R) modules instead of ultra wideband (UWB) T/R modules. Furthermore, the...
Show moreA shared-aperture reconfigurable slot-ring antenna array switching between different frequency bands and polarizations is presented for phased array applications. PIN diode switches are incorporated into the slots of the antenna to change the state of the reconfigurable slot-ring antenna array. Each frequency band has its own feeding lines which allows for the use of high-performance narrow-band transmit/receive (T/R) modules instead of ultra wideband (UWB) T/R modules. Furthermore, the spacing between the elements in each frequency band is less than half free-space wavelength (?0) over the frequency band of operation which enables grating-lobe-free beam scanning. This is the first shared-aperture reconfigurable dual-polarized antenna with separate feeding for each band which is scalable to a larger array with element spacing of less than 0.5?0 in all frequency bands of operation.First, a switchable-band reconfigurable antenna array switching between L and C bands is presented. This antenna operates at 1.76/5.71 GHz with a fractional bandwidth (FBW) of 8.6%/11.5%, realized gain of 0.1/4.2 dBi and radiation efficiency of 66.6%/80.7% in the L-/C- band operating states, respectively. Second, a wideband version of the reconfigurable antenna element using fractal geometries is presented. This dual-polarized antenna element is switching between S and C bands with wide bandwidth in each operating state. In the S-/C-band operating state, this antenna shows 69.1%/58.3% FBW with a maximum realized gain of 2.4/3.1 dBi. Third, the wideband antenna element is extended to an antenna array. The reconfigurable dual-polarized antenna array with vertical coaxial feeding switches between S- and C-band states with full-band coverage. A 2(&)#215;2 S-band antenna array can be reconfigured to a 4(&)#215;4 C-band antenna array by activating/deactivating PIN diode switches. This antenna array shows 64.3%/66.7% FBW with 8.4/14.3 dBi maximum realized gain in the S-/C-band operating states, respectively. Finally, a reconfigurable antenna element covering three adjacent frequency bands is presented. The FBW of this tri-band antenna element is 75%/63%/26% in the S/C/X band state.
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Date Issued: 2018
Identifier: CFE0007373, ucf:52092
Format: Document (PDF)
PURL: http://purl.flvc.org/ucf/fd/CFE0007373

Title: LASER ENHANCED DOPING FOR SILICON CARBIDE WHITE LIGHTEMITTING DIODES.
Creator: Bet, Sachin, Kar, Aravinda, University of Central Florida
Abstract / Description: This work establishes a solid foundation for the use of indirect band gap semiconductors for light emitting application and presents the work on development of white light emitting diodes (LEDs) in silicon carbide (SiC). Novel laser doping has been utilized to fabricate white light emitting diodes in 6H-SiC (n-type N) and 4H-SiC (p-type Al) wafers. The emission of different colors to ultimately generate white light is tailored on the basis of donor acceptor pair (DAP) recombination mechanism...
Show moreThis work establishes a solid foundation for the use of indirect band gap semiconductors for light emitting application and presents the work on development of white light emitting diodes (LEDs) in silicon carbide (SiC). Novel laser doping has been utilized to fabricate white light emitting diodes in 6H-SiC (n-type N) and 4H-SiC (p-type Al) wafers. The emission of different colors to ultimately generate white light is tailored on the basis of donor acceptor pair (DAP) recombination mechanism for luminescence. A Q-switched Nd:YAG pulse laser (1064 nm wavelength) was used to carry out the doping experiments. The p and n regions of the white SiC LED were fabricated by laser doping an n-type 6H-SiC and p-type 4H-SiC wafer substrates with respective dopants. Cr, B and Al were used as p-type dopants (acceptors) while N and Se were used as n-type dopants (donors). Deep and shallow donor and acceptor impurity level states formed by these dopants tailor the color properties for pure white light emission. The electromagnetic field of lasers and non-equilibrium doping conditions enable laser doping of SiC with increased dopant diffusivity and enhanced solid solubility. A thermal model is utilized to determine the laser doping parameters for temperature distribution at various depths of the wafer and a diffusion model is presented including the effects of Fick's diffusion, laser electromagnetic field and thermal stresses due to localized laser heating on the mass flux of dopant atoms. The dopant diffusivity is calculated as a function of temperature at different depths of the wafer based on measured dopant concentration profile. The maximum diffusivities achieved in this study are 4.6110-10 cm2/s at 2898 K and 6.9210-12 cm2/s at 3046 K for Cr in 6H-SiC and 4H-SiC respectively. Secondary ion mass spectrometric (SIMS) analysis showed the concentration profile of Cr in SiC having a penetration depth ranging from 80 nm in p-type 4H-SiC to 1.5 m in n-type 6H-SiC substrates respectively. The SIMS data revealed enhanced solid solubility (2.291019 cm-3 in 6H-SiC and 1.421919 cm-3 in 4H-SiC) beyond the equilibrium limit (31017 cm-3 in 6H-SiC above 2500 C) for Cr in SiC. It also revealed similar effects for Al and N. The roughness, surface chemistry and crystalline integrity of the doped sample were examined by optical interferometer, energy dispersive X-ray spectrometry (EDS) and transmission electron microscopy (TEM) respectively. Inspite of the larger atomic size of Cr compared to Si and C, the non-equilibrium conditions during laser doping allow effective incorporation of dopant atoms into the SiC lattice without causing any damage to the surface or crystal lattice. Deep Level Transient Spectroscopy (DLTS) confirmed the deep level acceptor state of Cr with activation energies of Ev+0.80 eV in 4H-SiC and Ev+0.45 eV in 6H-SiC. The Hall Effect measurements showed the hole concentration to be 1.981019 cm-3 which is almost twice the average Cr concentration (11019 cm-3) obtained from the SIMS data. These data confirmed that almost all of the Cr atoms were completely activated to the double acceptor state by the laser doping process without requiring any subsequent annealing step. Electroluminescence studies showed blue (460-498 nm), blue-green (500-520 nm) green (521-575 nm), and orange (650-690 nm) wavelengths due to radiative recombination transitions between donor-acceptors pairs of N-Al, N-B, N-Cr and Cr-Al respectively, while a prominent violet (408 nm) wavelength was observed due to transitions from the nitrogen level to the valence band level. The red (698-738 nm) luminescence was mainly due to metastable mid-bandgap states, however under high injection current it was due to the quantum mechanical phenomenon pertaining to band broadening and overlapping. This RGB combination produced a broadband white light spectrum extending from 380 to 900 nm. The color space tri-stimulus values for 4H-SiC doped with Cr and N were X = 0.3322, Y = 0.3320 and Z = 0.3358 as per 1931 CIE (International Commission on Illumination) corresponding to a color rendering index of 96.56 and the color temperature of 5510 K. And for 6H-SiC n-type doped with Cr and Al, the color space tri-stimulus values are X = 0.3322, Y = 0.3320 and Z = 0.3358. The CCT was 5338 K, which is very close to the incandescent lamp (or black body) and lies between bright midday sun (5200 K) and average daylight (5500 K) while CRI was 98.32. Similar white LED's were also fabricated using Cr, Al, Se as one set of dopants and B, Al, N as another.
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Date Issued: 2008
Identifier: CFE0002362, ucf:47808
Format: Document (PDF)
PURL: http://purl.flvc.org/ucf/fd/CFE0002362

Title: DESIGN OF LOW-CAPACITANCE AND HIGH-SPEED ELECTROSTATIC DISCHARGE (ESD) DEVICES FOR LOW-VOLTAGE PROTECTION APPLICATIONS.
Creator: Li, You, Liou, Juin J., University of Central Florida
Abstract / Description: Electrostatic discharge (ESD) is defined as the transfer of charge between bodies at different potentials. The electrostatic discharge induced integrated circuit damages occur throughout the whole life of a product from the manufacturing, testing, shipping, handing, to end user operating stages. This is particularly true as microelectronics technology continues shrink to nano-metric dimensions. The ESD related failures is a major IC reliability concern and results in a loss of millions...
Show moreElectrostatic discharge (ESD) is defined as the transfer of charge between bodies at different potentials. The electrostatic discharge induced integrated circuit damages occur throughout the whole life of a product from the manufacturing, testing, shipping, handing, to end user operating stages. This is particularly true as microelectronics technology continues shrink to nano-metric dimensions. The ESD related failures is a major IC reliability concern and results in a loss of millions dollars to the semiconductor industry each year. Several ESD stress models and test methods have been developed to reproduce the real world ESD discharge events and quantify the sensitivity of ESD protection structures. The basic ESD models are: Human body model (HBM), Machine model (MM), and Charged device model (CDM). To avoid or reduce the IC failure due to ESD, the on-chip ESD protection structures and schemes have been implemented to discharge ESD current and clamp overstress voltage under different ESD stress events. Because of its simple structure and good performance, the junction diode is widely used in on-chip ESD protection applications. This is particularly true for ESD protection of low-voltage ICs where a relatively low trigger voltage for the ESD protection device is required. However, when the diode operates under the ESD stress, its current density and temperature are far beyond the normal conditions and the device is in danger of being damaged. For the design of effective ESD protection solution, the ESD robustness and low parasitic capacitance are two major concerns. The ESD robustness is usually defined after the failure current It2 and on-state resistance Ron. The transmission line pulsing (TLP) measurement is a very effective tool for evaluating the ESD robustness of a circuit or single element. This is particularly helpful in characterizing the effect of HBM stress where the ESD-induced damages are more likely due to thermal failures. Two types of diodes with different anode/cathode isolation technologies will be investigated for their ESD performance: one with a LOCOS (Local Oxidation of Silicon) oxide isolation called the LOCOS-bound diode, the other with a polysilicon gate isolation called the polysilicon-bound diode. We first examine the ESD performance of the LOCOS-bound diode. The effects of different diode geometries, metal connection patterns, dimensions and junction configurations on the ESD robustness and parasitic capacitance are investigated experimentally. The devices considered are N+/P-well junction LOCOS-bound diodes having different device widths, lengths and finger numbers, but the approach applies generally to the P+/N-well junction diode as well. The results provide useful insights into optimizing the diode for robust HBM ESD protection applications. Then, the current carrying and voltage clamping capabilities of LOCOS- and polysilicon-bound diodes are compared and investigated based on both TCAD simulation and experimental results. Comparison of these capabilities leads to the conclusion that the polysilicon-bound diode is more suited for ESD protection applications due to its higher performance. The effects of polysilicon-bound diodeÃ‚Â's design parameters, including the device width, anode/cathode length, finger number, poly-gate length, terminal connection and metal topology, on the ESD robustness are studied. Two figures of merits, FOM_It2 and FOM_Ron, are developed to better assess the effects of different parameters on polysilicon-bound diodeÃ‚Â's overall ESD performance. As latest generation package styles such as mBGAs, SOTs, SC70s, and CSPs are going to the millimeter-range dimensions, they are often effectively too small for people to handle with fingers. The recent industry data indicates the charged device model (CDM) ESD event becomes increasingly important in todayÃ‚Â's manufacturing environment and packaging technology. This event generates highly destructive pulses with a very short rise time and very small duration. TLP has been modified to probe CDM ESD protection effectiveness. The pulse width was reduced to the range of 1-10 ns to mimic the very fast transient of the CDM pulses. Such a very fast TLP (VFTLP) testing has been used frequently for CDM ESD characterization. The overshoot voltage and turn-on time are two key considerations for designing the CDM ESD protection devices. A relatively high overshoot voltage can cause failure of the protection devices as well as the protected devices, and a relatively long turn-on time may not switch on the protection device fast enough to effectively protect the core circuit against the CDM stress. The overshoot voltage and turn-on time of an ESD protection device can be observed and extracted from the voltage versus time waveforms measured from the VFTLP testing. Transient behaviors of polysilicon-bound diodes subject to pulses generated by the VFTLP tester are characterized for fast ESD events such as the charged device model. The effects of changing devicesÃ‚Â' dimension parameters on the transient behaviors and on the overshoot voltage and turn-on time are studied. The correlation between the diode failure and poly-gate configuration under the VFTLP stress is also investigated. Silicon-controlled rectifier (SCR) is another widely used ESD device for protecting the I/O pins and power supply rails of integrated circuits. Multiple fingers are often needed to achieve optimal ESD protection performance, but the uniformity of finger triggering and current flow is always a concern for multi-finger SCR devices operating under the post-snapback region. Without a proper understanding of the finger turn-on mechanism, design and realization of robust SCRs for ESD protection applications are not possible. Two two-finger SCRs with different combinations of anode/cathode regions are considered, and their finger turn-on uniformities are analyzed based on the I-V characteristics obtained from the transmission line pulsing (TLP) tester. The dV/dt effect of pulses with different rise times on the finger turn-on behavior of the SCRs are also investigated experimentally. In this work, unless noted otherwise, all the measurements are conducted using the Barth 4002 transmission line pulsing (TLP) and Barth 4012 very-fast transmission line pulsing (VFTLP) testers.
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Date Issued: 2010
Identifier: CFE0003440, ucf:48401
Format: Document (PDF)
PURL: http://purl.flvc.org/ucf/fd/CFE0003440

Title: ANTENNA-COUPLED TUNNEL DIODES FOR DUAL-BAND MILLIMETER-WAVE/INFRARED FOCAL-PLANE ARRAYS.
Creator: Abdel Rahman, Mohamed, Boreman, Glenn, University of Central Florida
Abstract / Description: The infrared and millimeter-wave portions of the spectrum both have their advantages for development of imaging systems. Because of the difference in wavelengths, infrared imagers offer inherently high resolution, while millimeter-wave systems have better penetration through atmospheric aerosols such as fog and smoke. Shared-aperture imaging systems employing a common focal-plane array that responds to both wavebands are desirable from the viewpoint of overall size and weight. We have...
Show moreThe infrared and millimeter-wave portions of the spectrum both have their advantages for development of imaging systems. Because of the difference in wavelengths, infrared imagers offer inherently high resolution, while millimeter-wave systems have better penetration through atmospheric aerosols such as fog and smoke. Shared-aperture imaging systems employing a common focal-plane array that responds to both wavebands are desirable from the viewpoint of overall size and weight. We have developed antenna-coupled sensors that respond simultaneously at 30 THz and at 94 GHz, utilizing electron-beam lithography. Slot-antenna designs were found to be particularly suitable for coupling radiation into metal-oxide-metal (MOM) tunnel diodes at both frequencies. The MOM diodes are fabricated in a layered structure of Ni-NiO-Ni, and act as rectifying contacts. With contact areas as low as 120 nm × 120 nm, these diodes have time constants commensurate with rectification at frequencies across the desired millimeter-wave and infrared bands. One challenge in the development of true focal-plane array imagers across this factor-of-300 bandwidth is that the optimum spatial sampling interval on the focal plane is different in both bands. We have demonstrated a focal plane with interleaved infrared and millimeter-wave sensors by fabricating infrared antennas in the ground plane of the millimeter-wave antenna. Measured performance data in both bands are presented for individual antenna-coupled sensors as well as for devices in the dual-band focal-plane-array format.
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Date Issued: 2004
Identifier: CFE0000305, ucf:46309
Format: Document (PDF)
PURL: http://purl.flvc.org/ucf/fd/CFE0000305

Title: Electrostatic control over temperature-dependent tunneling across single-molecule junctions.
Creator: Rodriguez Garrigues, Alvar, Del Barco, Enrique, Flitsiyan, Elena, Ishigami, Masa, Hernandez, Eloy, University of Central Florida
Abstract / Description: The aim of the present dissertation is to improve the understanding and methodology of temperature-dependent tunnel conduction through individual molecules by single-electron transport spectroscopy. New advances in electrochemistry present individual molecular diodes as a realistic option for the implementation on molecular circuits thanks to their high current rectification ratios. Therefore, a major requisite in this field is to understand and control the conduction behaviors for a large...
Show moreThe aim of the present dissertation is to improve the understanding and methodology of temperature-dependent tunnel conduction through individual molecules by single-electron transport spectroscopy. New advances in electrochemistry present individual molecular diodes as a realistic option for the implementation on molecular circuits thanks to their high current rectification ratios. Therefore, a major requisite in this field is to understand and control the conduction behaviors for a large variety of conditions. This work focuses on the electric conduction through ferrocene-based molecules as a function of temperatures within a wide range of bias and gate voltages by means of three-terminal electromigrated-broken single-electron transistors (SETs).The results show that the temperature dependence of the current (from 80 to 260 K) depends strongly on the bias and gate voltages, with areas in where the current increases exponentially with temperature (at the Coulomb blockade regimes), and others where the increase of the temperature makes the current only to vary slightly (at resonance) or to decrease monotonically (at the charge degeneracy points). These different observed behaviors of the tunneling current with increasing temperatures can be well explained by a formal single-level coherent tunneling model where the temperature dependence relies on the thermal broadening of the Fermi distributions of the electrons in the leads. The model portraits the molecule as a localized electrostatic level capacitively coupled to the transistor leads, and the electrical conduction through the junction as coherent sequential tunneling.
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Date Issued: 2016
Identifier: CFE0006171, ucf:51132
Format: Document (PDF)
PURL: http://purl.flvc.org/ucf/fd/CFE0006171

Title: THERMAL MANAGEMENT, BEAM CONTROL,AND PACKAGING DESIGNS FOR HIGH POWER DIODE LASER ARRAYS AND PUMP CAVITY DESIGNS FOR DIODE LASER ARRAY PUMPED ROD SHAPED LASERS.
Creator: Chung, Te-yuan, Bass, Michael, University of Central Florida
Abstract / Description: Several novel techniques for controlling, managing and utilizing high power diode lasers are described. Low pressure water spray cooling for a high heat flux system is developed and proven to be an ideal cooling method for high power diode laser arrays. In order to enable better thermal and optical performance of diode laser arrays, a new and simple optical element, the beam control prism, is invented. It provides the ability to accomplish beam shaping and beam tilting at the same time....
Show moreSeveral novel techniques for controlling, managing and utilizing high power diode lasers are described. Low pressure water spray cooling for a high heat flux system is developed and proven to be an ideal cooling method for high power diode laser arrays. In order to enable better thermal and optical performance of diode laser arrays, a new and simple optical element, the beam control prism, is invented. It provides the ability to accomplish beam shaping and beam tilting at the same time. Several low thermal resistance diode packaging designs using beam control prisms are proposed, studied and produced. Two pump cavity designs using a diode laser array to uniformly pump rod shape gain media are also investigated.
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Date Issued: 2004
Identifier: CFE0000259, ucf:46222
Format: Document (PDF)
PURL: http://purl.flvc.org/ucf/fd/CFE0000259

Title: A Multi-Species Single-LED Hazardous Gas Sensor for Commercial Space Applications.
Creator: Parupalli, Akshita, Vasu Sumathi, Subith, Ahmed, Kareem, Chow, Louis, University of Central Florida
Abstract / Description: In the interest of furthering both commercial and government-funded opportunities for deep space exploration, the safety of life and equipment onboard must be absolutely certain. In this regard, the presence of any hazardous gases or combustion events onboard space vehicles must be quickly characterized and detected. Several hazardous gases of interest have absorption features in the mid-infrared range and can be detected with an infrared light source, via the principles of absorption...
Show moreIn the interest of furthering both commercial and government-funded opportunities for deep space exploration, the safety of life and equipment onboard must be absolutely certain. In this regard, the presence of any hazardous gases or combustion events onboard space vehicles must be quickly characterized and detected. Several hazardous gases of interest have absorption features in the mid-infrared range and can be detected with an infrared light source, via the principles of absorption spectroscopy. A non-dispersive infrared (NDIR) sensor that follows these principles has been developed to utilize light-emitting diodes (LEDs) for gas detection and quantification. LEDs contain a particular advantage in this situation because they have low power requirements, are robust and easily adaptable, and they are cheaper than existing laser-based systems. The design has successfully performed several laboratory, environmental chamber, and high-altitude balloon flight tests. The main purpose of these various tests was to place the sensor in challenging environments, examine the effects on sensor performance, and adjust accordingly.The current sensor design utilizes a single 4.2?m LED and a rotating diffraction grating to detect both carbon dioxide (CO2) and nitrous oxide (N2O) within a single scan. These measurements were further validated using two distributed feedback quantum cascade lasers (QCL) centered at 4.25?m and 4.58?m. The sensor collected data on a wavelength range of 4117nm to 4592nm. Mixtures containing the concentrations of the two species of interest varying from 0.2% to 0.8% were analyzed. The integrated absorbance data was calculated for each species and compared with theoretical predictions. The results show that the data follows the expected behavior and correlates better at lower concentrations. Subsequent work on this sensor will focus on increasing the quantity of identifiable gases and on further testing in hazardous environments.
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Date Issued: 2019
Identifier: CFE0007898, ucf:52752
Format: Document (PDF)
PURL: http://purl.flvc.org/ucf/fd/CFE0007898

Title: Design, Characterization and Analysis of Electrostatic Discharge (ESD) Protection Solutions in Emerging and Modern Technologies.
Creator: Liu, Wen, Liou, Juin, Yuan, Jiann-Shiun, Sundaram, Kalpathy, Shen, Zheng, Chen, Quanfang, University of Central Florida
Abstract / Description: Electrostatic Discharge (ESD) is a significant hazard to electronic components and systems. Based on a specific processing technology, a given circuit application requires a customized ESD consideration that includes the devices' operating voltage, leakage current, breakdown constraints, and footprint. As new technology nodes mature every 3-5 years, design of effective ESD protection solutions has become more and more challenging due to the narrowed design window, elevated electric field and...
Show moreElectrostatic Discharge (ESD) is a significant hazard to electronic components and systems. Based on a specific processing technology, a given circuit application requires a customized ESD consideration that includes the devices' operating voltage, leakage current, breakdown constraints, and footprint. As new technology nodes mature every 3-5 years, design of effective ESD protection solutions has become more and more challenging due to the narrowed design window, elevated electric field and current density, as well as new failure mechanisms that are not well understood. The endeavor of this research is to develop novel, effective and robust ESD protection solutions for both emerging technologies and modern complementary metal(-)oxide(-)semiconductor (CMOS) technologies.The Si nanowire field-effect transistors are projected by the International Technology Roadmap for Semiconductors as promising next-generation CMOS devices due to their superior DC and RF performances, as well as ease of fabrication in existing Silicon processing. Aiming at proposing ESD protection solutions for nanowire based circuits, the dimension parameters, fabrication process, and layout dependency of such devices under Human Body Mode (HBM) ESD stresses are studied experimentally in company with failure analysis revealing the failure mechanism induced by ESD. The findings, including design methodologies, failure mechanism, and technology comparisons should provide practical knowhow of the development of ESD protection schemes for the nanowire based integrated circuits. Organic thin-film transistors (OTFTs) are the basic elements for the emerging flexible, printable, large-area, and low-cost organic electronic circuits. Although there are plentiful studies focusing on the DC stress induced reliability degradation, the operation mechanism of OTFTs subject to ESD is not yet available in the literature and are urgently needed before the organic technology can be pushed into consumer market. In this work, the ESD operation mechanism of OTFT depending on gate biasing condition and dimension parameters are investigated by extensive characterization and thorough evaluation. The device degradation evolution and failure mechanism under ESD are also investigated by specially designed experiments. In addition to the exploration of ESD protection solutions in emerging technologies, efforts have also been placed in the design and analysis of a major ESD protection device, diode-triggered-silicon-controlled-rectifier (DTSCR), in modern CMOS technology (90nm bulk). On the one hand, a new type DTSCR having bi-directional conduction capability, optimized design window, high HBM robustness and low parasitic capacitance are developed utilizing the combination of a bi-directional silicon-controlled-rectifier and bi-directional diode strings. On the other hand, the HBM and Charged Device Mode (CDM) ESD robustness of DTSCRs using four typical layout topologies are compared and analyzed in terms of trigger voltage, holding voltage, failure current density, turn-on time, and overshoot voltage. The advantages and drawbacks of each layout are summarized and those offering the best overall performance are suggested at the end.
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Date Issued: 2012
Identifier: CFE0004571, ucf:49199
Format: Document (PDF)
PURL: http://purl.flvc.org/ucf/fd/CFE0004571

Title: SPRAY COOLING FOR LAND, SEA, AIR AND SPACE BASED APPLICATIONS,A FLUID MANAGEMENT SYSTEM FOR MULTIPLE NOZZLE SPRAY COOLING AND A GUIDE TO HIGH HEAT FLUX HEATER DESIGN.
Creator: Glassman, Brian, Chow, Louis, University of Central Florida
Abstract / Description: This thesis is divided into four distinct chapters all linked by the topic of spray cooling. Chapter one gives a detailed categorization of future and current spray cooling applications, and reviews the major advantages and disadvantages that spray cooling has over other high heat flux cooling techniques. Chapter two outlines the developmental goals of spray cooling, which are to increase the output of a current system and to enable new technologies to be technically feasible. Furthermore,...
Show moreThis thesis is divided into four distinct chapters all linked by the topic of spray cooling. Chapter one gives a detailed categorization of future and current spray cooling applications, and reviews the major advantages and disadvantages that spray cooling has over other high heat flux cooling techniques. Chapter two outlines the developmental goals of spray cooling, which are to increase the output of a current system and to enable new technologies to be technically feasible. Furthermore, this chapter outlines in detail the impact that land, air, sea, and space environments have on the cooling system and what technologies could be enabled in each environment with the aid of spray cooling. In particular, the heat exchanger, condenser and radiator are analyzed in their corresponding environments. Chapter three presents an experimental investigation of a fluid management system for a large area multiple nozzle spray cooler. A fluid management or suction system was used to control the liquid film layer thickness needed for effective heat transfer. An array of sixteen pressure atomized spray nozzles along with an imbedded fluid suction system was constructed. Two surfaces were spray tested one being a clear grooved Plexiglas plate used for visualization and the other being a bottom heated grooved 4.5 x 4.5 cm2 copper plate used to determine the heat flux. The suction system utilized an array of thin copper tubes to extract excess liquid from the cooled surface. Pure water was ejected from two spray nozzle configurations at flow rates of 0.7 L/min to 1 L/min per nozzle. It was found that the fluid management system provided fluid removal efficiencies of 98% with a 4-nozzle array, and 90% with the full 16-nozzle array for the downward spraying orientation. The corresponding heat fluxes for the 16 nozzle configuration were found with and without the aid of the fluid management system. It was found that the fluid management system increased heat fluxes on the average of 30 W/cm2 at similar values of superheat. Unfortunately, the effectiveness of this array at removing heat at full levels of suction is approximately 50% & 40% of a single nozzle at respective 10„aC & 15„aC values of superheat. The heat transfer data more closely resembled convective pooling boiling. Thus, it was concluded that the poor heat transfer was due to flooding occurring which made the heat transfer mechanism mainly forced convective boiling and not spray cooling. Finally, Chapter four gives a detailed guide for the design and construction of a high heat flux heater for experimental uses where accurate measurements of surface temperatures and heat fluxes are extremely important. The heater designs presented allow for different testing applications; however, an emphasis is placed on heaters designed for use with spray cooling.
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Date Issued: 2005
Identifier: CFE0000473, ucf:46351
Format: Document (PDF)
PURL: http://purl.flvc.org/ucf/fd/CFE0000473

Diode (2)	+ -
ESD (2)	+ -
LDMOS (2)	+ -
Reliability (2)	+ -
solid state laser (2)	+ -

spray cooling (2)	+ -
Accelerated Test (1)	+ -
Bypass Diode (1)	+ -
Charged Device Mode (1)	+ -
DLTS (1)	+ -
Diffusion (1)	+ -
Diode Pumped Lasers (1)	+ -
Diode laser array (1)	+ -
Diodes (1)	+ -
Electrostatic Discharge (1)	+ -
Electrostatic discharge (ESD) (1)	+ -
Endotaxy (1)	+ -
Failure Rate (1)	+ -
Focal plane array (1)	+ -
GGNMOS (1)	+ -
Hall Effect (1)	+ -
Human Body Mode (1)	+ -
ITO heaters (1)	+ -
Infrared antenna (1)	+ -
Laser Doping (1)	+ -
Laser doping (1)	+ -
Laser metallization (1)	+ -
Low-voltage (1)	+ -
MOM diode (1)	+ -
Millimeter-wave antenna (1)	+ -

University of Central Florida (15)	+ -
Sundaram, Kalpathy (4)	+ -
Abdolvand, Reza (2)	+ -
Bass, Michael (2)	+ -
Chow, Louis (2)	+ -

Fan, Deliang (2)	+ -
Gong, Xun (2)	+ -
Kar, Aravinda (2)	+ -
Salcedo, Javier (2)	+ -
Abdel Rahman, Mohamed (1)	+ -
Ahmed, Kareem (1)	+ -
Atia, George (1)	+ -
Batarseh, Issa (1)	+ -
Bet, Sachin (1)	+ -
Boreman, Glenn (1)	+ -
Chen, Quanfang (1)	+ -
Chung, Te-yuan (1)	+ -
Clarke, Thomas (1)	+ -
Del Barco, Enrique (1)	+ -
Deschaine, Wesley (1)	+ -
Flitsiyan, Elena (1)	+ -
Glassman, Brian (1)	+ -
Hernandez, Eloy (1)	+ -
Ishigami, Masa (1)	+ -
Jin, Yier (1)	+ -
Jones, W Linwood (1)	+ -
Kincaid, John (1)	+ -
Kuebler, Stephen (1)	+ -
Li, Hang (1)	+ -
Li, You (1)	+ -

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