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STEADY STATE AND DYNAMIC ANALYSIS AND OPTIMIZATION OF SINGLE-STAGE POWER FACTOR CORRECTION CONVERTERS
Title
STEADY STATE AND DYNAMIC ANALYSIS AND OPTIMIZATION OF SINGLE-STAGE POWER FACTOR CORRECTION CONVERTERS.
Creator
Rustom, Khalid, Batarseh, Issa, University of Central Florida
Abstract / Description
With the increased interest in applying Power Factor Correction (PFC) to off-line AC-DC converters, the field of integrated, single-stage PFC converter development has attracted wide attention. Considering the tens of millions of low-to-medium power supplies manufactured each year for today's rechargeable equipment, the expected reduction in cost by utilizing advanced technologies is significant. To date, only a few single-stage topologies have made it to the market due to the inherit...
Show moreWith the increased interest in applying Power Factor Correction (PFC) to off-line AC-DC converters, the field of integrated, single-stage PFC converter development has attracted wide attention. Considering the tens of millions of low-to-medium power supplies manufactured each year for today's rechargeable equipment, the expected reduction in cost by utilizing advanced technologies is significant. To date, only a few single-stage topologies have made it to the market due to the inherit limitations in this structure. The high voltage and current stresses on the components led to reduced efficiency and an increased failure rate. In addition, the component prices tend to increase with increased electrical and thermal requirements, jeopardizing the overarching goal of price reduction. The absence of dedicated control circuitry for each stage complicates the power balance in these converters, often resulting in an oversized bus capacitance. These factors have impeded widespread acceptance of these new techniques by manufacturers, and as such single stage PFC has remained largely a drawing board concept. This dissertation will present an in-depth study of innovative solutions that address these problems directly, rather than proposing more topologies with the same type of issues. The direct energy transfer concept is analyzed and presented as a promising solution for the majority of the single-stage PFC converter limitations. Three topologies are presented and analyzed based on this innovative structure. To complete the picture, the dynamics of a variety of single-stage converters can be analyzed using a proposed switched transformer model.
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Date Issued
2007
Identifier
CFE0001940, ucf:47449
Format
Document (PDF)
PURL
http://purl.flvc.org/ucf/fd/CFE0001940
Dynamic modeling of pwm and single-switch single-stage power factor correction converters
Title
Dynamic modeling of pwm and single-switch single-stage power factor correction converters.
Creator
Zhu, Guangyong, Batarseh, Issa E., Engineering
Abstract / Description
University of Central Florida College of Engineering Thesis; The concept of averaging has been used extensively in the modeling of power electronic circuits to overcome their inherent time-variant nature. Among various methods, the PWM switch modeling approach is most widely accepted in the study of closed-loop stability and transient response because of its accuracy and simplicity. However, a non-ideal PWM switch model considering conduction losses is not available except for converters...
Show moreUniversity of Central Florida College of Engineering Thesis; The concept of averaging has been used extensively in the modeling of power electronic circuits to overcome their inherent time-variant nature. Among various methods, the PWM switch modeling approach is most widely accepted in the study of closed-loop stability and transient response because of its accuracy and simplicity. However, a non-ideal PWM switch model considering conduction losses is not available except for converters operating in continuous conduction mode (CCM) and under small ripple conditions. Modeling of conductor losses under large ripple conditions has not been reported in the open literature, especially when the converter operates in discontinuous conduction mode (DCM). In this dissertation, new models are developed to include conduction losses in the non-ideal PWM switch model under CCM and DCM conditions. The developed model is verified through two converter examples and the effect of conduction losses on the steady state and dynamic responses of the converter is also studied. Another major constraint of the PWM switch modeling approach is that it heavily relies on finding the three-terminal PWM switch. This requirement severely limits its application in modeling single-switch single-stage power factor correction (PFC) converters, where more complex topological structures and switching actions are often encountered. In this work, we developed a new modeling approach which extends the PWM switch concept by identifying the charging and discharging voltages applied to the inductors. The new method can be easily applied to derive large-signal models for a large group of PFC converters and the procedure is elaborated through a specific example. Finally, analytical results regarding harmonic contents and power factors of various PWM converters in PFC applications are also presented here.
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Date Issued
1999
Identifier
CFR0001716, ucf:52925
Format
Document (PDF)
PURL
http://purl.flvc.org/ucf/fd/CFR0001716
HIGHLY INTEGRATED DC-DC CONVERTERS
Title
HIGHLY INTEGRATED DC-DC CONVERTERS.
Creator
Jia, Hongwei, Shen, Zhen, University of Central Florida
Abstract / Description
A monolithically integrated smart rectifier has been presented first in this work. The smart rectifier, which integrates a power MOSFET, gate driver and control circuitry, operates in a self-synchronized fashion based on its drain-source voltage, and does not need external control input. The analysis, simulation, and design considerations are described in detail. A 5V, 5-μm CMOS process was used to fabricate the prototype. Experimental results show that the proposed rectifier functions...
Show moreA monolithically integrated smart rectifier has been presented first in this work. The smart rectifier, which integrates a power MOSFET, gate driver and control circuitry, operates in a self-synchronized fashion based on its drain-source voltage, and does not need external control input. The analysis, simulation, and design considerations are described in detail. A 5V, 5-μm CMOS process was used to fabricate the prototype. Experimental results show that the proposed rectifier functions as expected in the design. Since no dead-time control needs to be used to switch the sync-FET and ctrl-FET, it is expected that the body diode losses can be reduced substantially, compared to the conventional synchronous rectifier. The proposed self-synchronized rectifier (SSR) can be operated at high frequencies and maintains high efficiency over a wide load range. As an example of the smart rectifierÂÂÂÂ's application in isolated DC-DC converter, a synchronous flyback converter with SSR is analyzed, designed and tested. Experimental results show that the operating frequency could be as high as 4MHz and the efficiency could be improved by more than 10% compared to that when a hyper fast diode rectifier is used. Based on a new current-source gate driver scheme, an integrated gate driver for buck converter is also developed in this work by using a 0.35μm CMOS process with optional high voltage (50V) power MOSFET. The integrated gate driver consists both the current-source driver for high-side power MOSFET and low-power driver for low-side power iv MOSFET. Compared with the conventional gate driver circuit, the current-source gate driver can recovery some gate charging energy and reduce switching loss. So the current-source driver (CSD) can be used to improve the efficiency performance in high frequency power converters. This work also presents a new implementation of a power supply in package (PSiP) 5MHz buck converter, which is different from all the prior-of-art PSiP solutions by using a high-Q bondwire inductor. The high-Q bondwire inductor can be manufactured by applying ferrite epoxy to the common bondwire during standard IC packaging process, so the new implementation of PSiP is expected to be a cost-effective way of power supply integration.
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Date Issued
2010
Identifier
CFE0003040, ucf:48354
Format
Document (PDF)
PURL
http://purl.flvc.org/ucf/fd/CFE0003040