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A COMMON COMPONENT-BASED SOFTWARE ARCHITECTURE FOR MILITARY AND COMMERCIAL PC-BASED VIRTUAL SIMULATION
Title
A COMMON COMPONENT-BASED SOFTWARE ARCHITECTURE FOR MILITARY AND COMMERCIAL PC-BASED VIRTUAL SIMULATION.
Creator
Lewis, Joshua, Proctor, Michael, University of Central Florida
Abstract / Description
Commercially available military-themed virtual simulations have been developed and sold for entertainment since the beginning of the personal computing era. There exists an intense interest by various branches of the military to leverage the technological advances of the personal computing and video game industries to provide low cost military training. By nature of the content of the commercial military-themed virtual simulations, a large overlap has grown between the interests, resources,...
Show moreCommercially available military-themed virtual simulations have been developed and sold for entertainment since the beginning of the personal computing era. There exists an intense interest by various branches of the military to leverage the technological advances of the personal computing and video game industries to provide low cost military training. By nature of the content of the commercial military-themed virtual simulations, a large overlap has grown between the interests, resources, standards, and technology of the computer entertainment industry and military training branches. This research attempts to identify these commonalities with the purpose of systematically designing and evaluating a common component-based software architecture that could be used to implement a framework for developing content for both commercial and military virtual simulation software applications.
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Date Issued
2006
Identifier
CFE0001268, ucf:46893
Format
Document (PDF)
PURL
http://purl.flvc.org/ucf/fd/CFE0001268
A COMMON COMPONENT-BASED SOFTWARE ARCHITECTURE FOR MILITARY AND COMMERCIAL PC-BASED VIRTUAL SIMULATION
Title
A COMMON COMPONENT-BASED SOFTWARE ARCHITECTURE FOR MILITARY AND COMMERCIAL PC-BASED VIRTUAL SIMULATION.
Creator
Lewis, Joshua, Proctor, Michael, University of Central Florida
Abstract / Description
Commercially available military-themed virtual simulations have been developed and sold for entertainment since the beginning of the personal computing era. There exists an intense interest by various branches of the military to leverage the technological advances of the personal computing and video game industries to provide low cost military training. By nature of the content of the commercial military-themed virtual simulations, a large overlap has grown between the interests, resources,...
Show moreCommercially available military-themed virtual simulations have been developed and sold for entertainment since the beginning of the personal computing era. There exists an intense interest by various branches of the military to leverage the technological advances of the personal computing and video game industries to provide low cost military training. By nature of the content of the commercial military-themed virtual simulations, a large overlap has grown between the interests, resources, standards, and technology of the computer entertainment industry and military training branches. This research attempts to identify these commonalities with the purpose of systematically designing and evaluating a common component-based software architecture that could be used to implement a framework for developing content for both commercial and military virtual simulation software applications.
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Date Issued
2006
Identifier
CFE0001177, ucf:46868
Format
Document (PDF)
PURL
http://purl.flvc.org/ucf/fd/CFE0001177
Harmony Oriented Architecture
Title
Harmony Oriented Architecture.
Creator
Martin, Kyle, Hua, Kien, Wu, Annie, Heinrich, Mark, University of Central Florida
Abstract / Description
This thesis presents Harmony Oriented Architecture: a novel architectural paradigm that applies the principles of Harmony Oriented Programming to the architecture of scalable and evolvable distributed systems. It is motivated by research on Ultra Large Scale systems that has revealed inherent limitations in human ability to design large-scale software systems that can only be overcome through radical alternatives to traditional object-oriented software engineering practice that simplifies the...
Show moreThis thesis presents Harmony Oriented Architecture: a novel architectural paradigm that applies the principles of Harmony Oriented Programming to the architecture of scalable and evolvable distributed systems. It is motivated by research on Ultra Large Scale systems that has revealed inherent limitations in human ability to design large-scale software systems that can only be overcome through radical alternatives to traditional object-oriented software engineering practice that simplifies the construction of highly scalable and evolvable system.HOP eschews encapsulation and information hiding, the core principles of object- oriented design, in favor of exposure and information sharing through a spatial abstraction. This helps to avoid the brittle interface dependencies that impede the evolution of object-oriented software. HOA extends these concepts to distributed systems resulting in an architecture in which application components are represented by objects in a spatial database and executed in strict isolation using an embedded application server. Application components store their state entirely in the database and interact solely by diffusing data into a space for proximate components to observe. This architecture provides a high degree of decoupling, isolation, and state exposure allowing highly scalable and evolvable applications to be built.A proof-of-concept prototype of a non-distributed HOA middleware platform supporting JavaScript application components is implemented and evaluated. Results show remarkably good performance considering that little effort was made to optimize the implementation.
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Date Issued
2011
Identifier
CFE0004480, ucf:49298
Format
Document (PDF)
PURL
http://purl.flvc.org/ucf/fd/CFE0004480
Adaptive Architectural Strategies for Resilient Energy-Aware Computing
Title
Adaptive Architectural Strategies for Resilient Energy-Aware Computing.
Creator
Ashraf, Rizwan, DeMara, Ronald, Lin, Mingjie, Wang, Jun, Jha, Sumit, Johnson, Mark, University of Central Florida
Abstract / Description
Reconfigurable logic or Field-Programmable Gate Array (FPGA) devices have the ability to dynamically adapt the computational circuit based on user-specified or operating-condition requirements. Such hardware platforms are utilized in this dissertation to develop adaptive techniques for achieving reliable and sustainable operation while autonomously meeting these requirements. In particular, the properties of resource uniformity and in-field reconfiguration via on-chip processors are exploited...
Show moreReconfigurable logic or Field-Programmable Gate Array (FPGA) devices have the ability to dynamically adapt the computational circuit based on user-specified or operating-condition requirements. Such hardware platforms are utilized in this dissertation to develop adaptive techniques for achieving reliable and sustainable operation while autonomously meeting these requirements. In particular, the properties of resource uniformity and in-field reconfiguration via on-chip processors are exploited to implement Evolvable Hardware (EHW). EHW utilize genetic algorithms to realize logic circuits at runtime, as directed by the objective function. However, the size of problems solved using EHW as compared with traditional approaches has been limited to relatively compact circuits. This is due to the increase in complexity of the genetic algorithm with increase in circuit size. To address this research challenge of scalability, the Netlist-Driven Evolutionary Refurbishment (NDER) technique was designed and implemented herein to enable on-the-fly permanent fault mitigation in FPGA circuits. NDER has been shown to achieve refurbishment of relatively large sized benchmark circuits as compared to related works. Additionally, Design Diversity (DD) techniques which are used to aid such evolutionary refurbishment techniques are also proposed and the efficacy of various DD techniques is quantified and evaluated.Similarly, there exists a growing need for adaptable logic datapaths in custom-designed nanometer-scale ICs, for ensuring operational reliability in the presence of Process, Voltage, and Temperature (PVT) and, transistor-aging variations owing to decreased feature sizes for electronic devices. Without such adaptability, excessive design guardbands are required to maintain the desired integration and performance levels. To address these challenges, the circuit-level technique of Self-Recovery Enabled Logic (SREL) was designed herein. At design-time, vulnerable portions of the circuit identified using conventional Electronic Design Automation tools are replicated to provide post-fabrication adaptability via intelligent techniques. In-situ timing sensors are utilized in a feedback loop to activate suitable datapaths based on current conditions that optimize performance and energy consumption. Primarily, SREL is able to mitigate the timing degradations caused due to transistor aging effects in sub-micron devices by reducing the stress induced on active elements by utilizing power-gating. As a result, fewer guardbands need to be included to achieve comparable performance levels which leads to considerable energy savings over the operational lifetime.The need for energy-efficient operation in current computing systems has given rise to Near-Threshold Computing as opposed to the conventional approach of operating devices at nominal voltage. In particular, the goal of exascale computing initiative in High Performance Computing (HPC) is to achieve 1 EFLOPS under the power budget of 20MW. However, it comes at the cost of increased reliability concerns, such as the increase in performance variations and soft errors. This has given rise to increased resiliency requirements for HPC applications in terms of ensuring functionality within given error thresholds while operating at lower voltages. My dissertation research devised techniques and tools to quantify the effects of radiation-induced transient faults in distributed applications on large-scale systems. A combination of compiler-level code transformation and instrumentation are employed for runtime monitoring to assess the speed and depth of application state corruption as a result of fault injection. Finally, fault propagation models are derived for each HPC application that can be used to estimate the number of corrupted memory locations at runtime. Additionally, the tradeoffs between performance and vulnerability and the causal relations between compiler optimization and application vulnerability are investigated.
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Date Issued
2015
Identifier
CFE0006206, ucf:52889
Format
Document (PDF)
PURL
http://purl.flvc.org/ucf/fd/CFE0006206