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EFFICIENCY IMPROVEMENT TECHNIQUES FOR HIGH VOLTAGE CAPACITOR CHARGING METHODS
Title
EFFICIENCY IMPROVEMENT TECHNIQUES FOR HIGH VOLTAGE CAPACITOR CHARGING METHODS.
Creator
Islas, Michael, Batarseh, Issa, University of Central Florida
Abstract / Description
The goal of this thesis is to design and fabricate a DC-to-DC converter for use in high-voltage capacitor charging applications. The primary objectives include increasing the efficiency and reducing the cost of traditional methods used for this application. Traditional methods were not designed specifically for high-voltage capacitor charging and were thus very primitive and exhibited lower efficiency. Prior methods made use of a high voltage power supply and a current limiting resistor or...
Show moreThe goal of this thesis is to design and fabricate a DC-to-DC converter for use in high-voltage capacitor charging applications. The primary objectives include increasing the efficiency and reducing the cost of traditional methods used for this application. Traditional methods were not designed specifically for high-voltage capacitor charging and were thus very primitive and exhibited lower efficiency. Prior methods made use of a high voltage power supply and a current limiting resistor or control scheme. The power supply would often only operate efficiently at a single voltage value and would thus function poorly over a range used in charging a capacitor. The resistor would also dissipate a fair amount of power, also limiting efficiency. This design makes use of a traditional flyback topology utilizing a controller developed specifically for this application, centering the design approach on the LT3750. Hence, taking full advantage of the efficiency improving control scheme it provides. Additionally, through the use of advanced techniques to eliminate noise and power losses, the efficiency may be significantly improved. A detailed theoretical analysis of the charger is also presented. The analysis will then be applied to optimization techniques to select ideal component values to meet specific design specifications. In this research, a specifically designed and developed prototype will be used to experimentally verify the theoretical work and optimization techniques.
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Date Issued
2009
Identifier
CFE0002899, ucf:48025
Format
Document (PDF)
PURL
http://purl.flvc.org/ucf/fd/CFE0002899
ADAPTIVE EFFICIENCY OPTIMIZATION FOR DIGITALLY CONTROLLED DC-DC CONVERTERS
Title
ADAPTIVE EFFICIENCY OPTIMIZATION FOR DIGITALLY CONTROLLED DC-DC CONVERTERS.
Creator
AL-HOOR, WISAM, Batarseh, Issa, University of Central Florida
Abstract / Description
The design optimization of DC-DC converters requires the optimum selection of several parameters to achieve improved efficiency and performance. Some of these parameters are load dependent, line dependent, components dependent, and/or temperature dependent. Designing such parameters for a specific load, input and output, components, and temperature may improve single design point efficiency but will not result in maximum efficiency at different conditions, and will not guarantee improvement...
Show moreThe design optimization of DC-DC converters requires the optimum selection of several parameters to achieve improved efficiency and performance. Some of these parameters are load dependent, line dependent, components dependent, and/or temperature dependent. Designing such parameters for a specific load, input and output, components, and temperature may improve single design point efficiency but will not result in maximum efficiency at different conditions, and will not guarantee improvement at that design point because of the components, temperature, and operating point variations. The ability of digital controllers to perform sophisticated algorithms makes it easy to apply adaptive control, where system parameters can be adaptively adjusted in response to system behavior in order to achieve better performance and stability. The use of adaptive control for power electronics is first applied with the Adaptive Frequency Optimization (AFO) method, which presents an auto-tuning adaptive digital controller with maximum efficiency point tracking to optimize DC-DC converter switching frequency. The AFO controller adjusts the DC-DC converter switching frequency while tracking the converter minimum input power point, under variable operating conditions, to find the optimum switching frequency that will result in minimum total loss and thus the maximum efficiency. Implementing variable switching frequencies in digital controllers introduces two main issues, namely, limit cycle oscillation and system instability. Dynamic Limit Cycle Algorithms (DLCA) is a dynamic technique tailored to improve system stability and to reduce limit cycle oscillation under variable switching frequency operation. The convergence speed and stability of AFO algorithm is further improved by presenting the analysis and design of a digital controller with adaptive auto-tuning algorithm that has a variable step size to track and detect the optimum switching frequency for a DC-DC converter. The Variable-Step-Size (VSS) algorithm is theoretically analyzed and developed based on buck DC-DC converter loss model and directed towered improving the convergence speed and accuracy of AFO adaptive loop by adjusting the converter switching frequency with variable step size. Finally, the efficiency of DC-DC converters is a function of several variables. Optimizing single variable alone may not result in maximum or global efficiency point. The issue of adjusting more than one variable at the same time is addressed by the Multivariable Adaptive digital Controller (MVAC). The MVAC is an adaptive method that continuously adjusts the DC-DC converter switching frequency and dead-time at the same time, while tracking the converter minimum input power, to find the maximum global efficiency point under variable conditions. In this research work, all adaptive methods were discussed, theoretically analyzed and its digital control algorithm along with experimental implementations were presented.
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Date Issued
2009
Identifier
CFE0002838, ucf:48072
Format
Document (PDF)
PURL
http://purl.flvc.org/ucf/fd/CFE0002838
Optimization of Ocean Thermal Energy Conversion Power Plants
Title
Optimization of Ocean Thermal Energy Conversion Power Plants.
Creator
Rizea, Steven, Ilie, Marcel, Bai, Yuanli, Vasu Sumathi, Subith, University of Central Florida
Abstract / Description
A proprietary Ocean Thermal Energy Conversion (OTEC) modeling tool, the Makai OTEC Thermodynamic and Economic Model (MOTEM), is leveraged to evaluate the accuracy of finite-time thermodynamic OTEC optimization methods. MOTEM is a full OTEC system simulator capable of evaluating the effects of variation in heat exchanger operating temperatures and seawater flow rates. The evaluation is based on a comparison of the net power output of an OTEC plant with a fixed configuration. Select...
Show moreA proprietary Ocean Thermal Energy Conversion (OTEC) modeling tool, the Makai OTEC Thermodynamic and Economic Model (MOTEM), is leveraged to evaluate the accuracy of finite-time thermodynamic OTEC optimization methods. MOTEM is a full OTEC system simulator capable of evaluating the effects of variation in heat exchanger operating temperatures and seawater flow rates. The evaluation is based on a comparison of the net power output of an OTEC plant with a fixed configuration. Select optimization methods from the literature are shown to produce between 93% and 99% of the maximum possible amount of power, depending on the selection of heat exchanger performance curves. OTEC optimization is found to be dependent on the performance characteristics of the evaporator and condenser used in the plant. Optimization algorithms in the literature do not take heat exchanger performance variation into account, which causes a discrepancy between their predictions and those calculated with MOTEM. A new characteristic metric of OTEC optimization, the ratio of evaporator and condenser overall heat transfer coefficients, is found. The heat transfer ratio is constant for all plant configurations in which the seawater flow rate is optimized for any particular evaporator and condenser operating temperatures. The existence of this ratio implies that a solution for the ideal heat exchanger operating temperatures could be computed based on the ratio of heat exchanger performance curves, and additional research is recommended.
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Date Issued
2012
Identifier
CFE0004430, ucf:49343
Format
Document (PDF)
PURL
http://purl.flvc.org/ucf/fd/CFE0004430
Energy Efficient and Secure Wireless Sensor Networks Design
Title
Energy Efficient and Secure Wireless Sensor Networks Design.
Creator
Attiah, Afraa, Zou, Changchun, Chatterjee, Mainak, Wang, Jun, Yuksel, Murat, Wang, Chung-Ching, University of Central Florida
Abstract / Description
ABSTRACTWireless Sensor Networks (WSNs) are emerging technologies that have the ability to sense,process, communicate, and transmit information to a destination, and they are expected to have significantimpact on the efficiency of many applications in various fields. The resource constraintsuch as limited battery power, is the greatest challenge in WSNs design as it affects the lifetimeand performance of the network. An energy efficient, secure, and trustworthy system is vital whena WSN...
Show moreABSTRACTWireless Sensor Networks (WSNs) are emerging technologies that have the ability to sense,process, communicate, and transmit information to a destination, and they are expected to have significantimpact on the efficiency of many applications in various fields. The resource constraintsuch as limited battery power, is the greatest challenge in WSNs design as it affects the lifetimeand performance of the network. An energy efficient, secure, and trustworthy system is vital whena WSN involves highly sensitive information. Thus, it is critical to design mechanisms that are energyefficient and secure while at the same time maintaining the desired level of quality of service.Inspired by these challenges, this dissertation is dedicated to exploiting optimization and gametheoretic approaches/solutions to handle several important issues in WSN communication, includingenergy efficiency, latency, congestion, dynamic traffic load, and security. We present severalnovel mechanisms to improve the security and energy efficiency of WSNs. Two new schemes areproposed for the network layer stack to achieve the following: (a) to enhance energy efficiencythrough optimized sleep intervals, that also considers the underlying dynamic traffic load and (b)to develop the routing protocol in order to handle wasted energy, congestion, and clustering. Wealso propose efficient routing and energy-efficient clustering algorithms based on optimization andgame theory. Furthermore, we propose a dynamic game theoretic framework (i.e., hyper defense)to analyze the interactions between attacker and defender as a non-cooperative security game thatconsiders the resource limitation. All the proposed schemes are validated by extensive experimentalanalyses, obtained by running simulations depicting various situations in WSNs in orderto represent real-world scenarios as realistically as possible. The results show that the proposedschemes achieve high performance in different terms, such as network lifetime, compared with thestate-of-the-art schemes.
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Date Issued
2018
Identifier
CFE0006971, ucf:51672
Format
Document (PDF)
PURL
http://purl.flvc.org/ucf/fd/CFE0006971
Design and Implementation of PV-Firming and Optimization Algorithms For Three-Port Microinverters
Title
Design and Implementation of PV-Firming and Optimization Algorithms For Three-Port Microinverters.
Creator
Alharbi, Mahmood, Batarseh, Issa, Haralambous, Michael, Mikhael, Wasfy, Yuan, Jiann-Shiun, Kutkut, Nasser, University of Central Florida
Abstract / Description
With the demand increase for electricity, the ever-increasing awareness of environmental issues, coupled with rolling blackouts, the role of renewable energy generation is increasing along with the thirst for electricity and awareness of environmental issues. This dissertation proposes the design and implementation of PV-firming and optimization algorithms for three-port microinverters.Novel strategies are proposed in Chapters 3 and 4 for harvesting stable solar power in spite of intermittent...
Show moreWith the demand increase for electricity, the ever-increasing awareness of environmental issues, coupled with rolling blackouts, the role of renewable energy generation is increasing along with the thirst for electricity and awareness of environmental issues. This dissertation proposes the design and implementation of PV-firming and optimization algorithms for three-port microinverters.Novel strategies are proposed in Chapters 3 and 4 for harvesting stable solar power in spite of intermittent solar irradiance. PV firming is implemented using a panel-level three-port grid-tied PV microinverter system instead of the traditional high-power energy storage and management system at the utility scale. The microinverter system consists of a flyback converter and an H-bridge inverter/rectifier, with a battery connected to the DC-link. The key to these strategies lies in using static and dynamic algorithms to generate a smooth PV reference power. The outcomes are applied to various control methods to charge/discharge the battery so that a stable power generation profile is obtained. In addition, frequency-based optimization for the inverter stage is presented.One of the design parameters of grid-tied single-phase H-bridge sinusoidal pulse-width modulation (SPWM) microinverters is switching frequency. The selection of the switching frequency is a tradeoff between improving the power quality by reducing the total harmonic distortion (THD), and improving the efficiency by reducing the switching loss. In Chapter 5, two algorithms are proposed for optimizing both the power quality and the efficiency of the microinverter. They do this by using a frequency tracking technique that requires no hardware modification. The first algorithm tracks the optimal switching frequency for maximum efficiency at a given THD value. The second maximizes the power quality of the H-bridge micro-inverter by tracking the switching frequency that corresponds to the minimum THD.Real-time PV intermittency and usable capacity data were evaluated and then further analyzed in MATLAB/SIMULINK to validate the PV firming control. The proposed PV firming and optimization algorithms were experimentally verified, and the results evaluated. Finally, Chapter 6 provides a summary of key conclusions and future work to optimize the presented topology and algorithms.
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Date Issued
2018
Identifier
CFE0007305, ucf:52166
Format
Document (PDF)
PURL
http://purl.flvc.org/ucf/fd/CFE0007305
Adaptive Architectural Strategies for Resilient Energy-Aware Computing
Title
Adaptive Architectural Strategies for Resilient Energy-Aware Computing.
Creator
Ashraf, Rizwan, DeMara, Ronald, Lin, Mingjie, Wang, Jun, Jha, Sumit, Johnson, Mark, University of Central Florida
Abstract / Description
Reconfigurable logic or Field-Programmable Gate Array (FPGA) devices have the ability to dynamically adapt the computational circuit based on user-specified or operating-condition requirements. Such hardware platforms are utilized in this dissertation to develop adaptive techniques for achieving reliable and sustainable operation while autonomously meeting these requirements. In particular, the properties of resource uniformity and in-field reconfiguration via on-chip processors are exploited...
Show moreReconfigurable logic or Field-Programmable Gate Array (FPGA) devices have the ability to dynamically adapt the computational circuit based on user-specified or operating-condition requirements. Such hardware platforms are utilized in this dissertation to develop adaptive techniques for achieving reliable and sustainable operation while autonomously meeting these requirements. In particular, the properties of resource uniformity and in-field reconfiguration via on-chip processors are exploited to implement Evolvable Hardware (EHW). EHW utilize genetic algorithms to realize logic circuits at runtime, as directed by the objective function. However, the size of problems solved using EHW as compared with traditional approaches has been limited to relatively compact circuits. This is due to the increase in complexity of the genetic algorithm with increase in circuit size. To address this research challenge of scalability, the Netlist-Driven Evolutionary Refurbishment (NDER) technique was designed and implemented herein to enable on-the-fly permanent fault mitigation in FPGA circuits. NDER has been shown to achieve refurbishment of relatively large sized benchmark circuits as compared to related works. Additionally, Design Diversity (DD) techniques which are used to aid such evolutionary refurbishment techniques are also proposed and the efficacy of various DD techniques is quantified and evaluated.Similarly, there exists a growing need for adaptable logic datapaths in custom-designed nanometer-scale ICs, for ensuring operational reliability in the presence of Process, Voltage, and Temperature (PVT) and, transistor-aging variations owing to decreased feature sizes for electronic devices. Without such adaptability, excessive design guardbands are required to maintain the desired integration and performance levels. To address these challenges, the circuit-level technique of Self-Recovery Enabled Logic (SREL) was designed herein. At design-time, vulnerable portions of the circuit identified using conventional Electronic Design Automation tools are replicated to provide post-fabrication adaptability via intelligent techniques. In-situ timing sensors are utilized in a feedback loop to activate suitable datapaths based on current conditions that optimize performance and energy consumption. Primarily, SREL is able to mitigate the timing degradations caused due to transistor aging effects in sub-micron devices by reducing the stress induced on active elements by utilizing power-gating. As a result, fewer guardbands need to be included to achieve comparable performance levels which leads to considerable energy savings over the operational lifetime.The need for energy-efficient operation in current computing systems has given rise to Near-Threshold Computing as opposed to the conventional approach of operating devices at nominal voltage. In particular, the goal of exascale computing initiative in High Performance Computing (HPC) is to achieve 1 EFLOPS under the power budget of 20MW. However, it comes at the cost of increased reliability concerns, such as the increase in performance variations and soft errors. This has given rise to increased resiliency requirements for HPC applications in terms of ensuring functionality within given error thresholds while operating at lower voltages. My dissertation research devised techniques and tools to quantify the effects of radiation-induced transient faults in distributed applications on large-scale systems. A combination of compiler-level code transformation and instrumentation are employed for runtime monitoring to assess the speed and depth of application state corruption as a result of fault injection. Finally, fault propagation models are derived for each HPC application that can be used to estimate the number of corrupted memory locations at runtime. Additionally, the tradeoffs between performance and vulnerability and the causal relations between compiler optimization and application vulnerability are investigated.
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Date Issued
2015
Identifier
CFE0006206, ucf:52889
Format
Document (PDF)
PURL
http://purl.flvc.org/ucf/fd/CFE0006206